KSZ8091MNX Datasheet, PDF (42/80 Pages) Micrel Semiconductor – 10Base-T/100Base-TX Physical Layer Transceiver

KSZ8091MNX/RNB
4.2 Standard Registers
Standard registers provide direct read/write access to a 32-register address space, as defined in Clause 22 of the IEEE
802.3 Specification. Within this address space, the first 16 registers (Registers 0h to Fh) are defined according to the
IEEE specification, while the remaining 16 registers (Registers 10h to 1Fh) are defined specific to the PHY vendor.
TABLE 4-3: IEEE DEFINED REGISTER DESCRIPTIONS
Address Name
Description
Mode
Note 4-1
Default
Register 0h – Basic Control
1 = Software reset
0.15
Reset
0 = Normal operation
This bit is self-cleared after a ‘1’ is written to it.
0.14
Loopback
1 = Loopback mode
0 = Normal operation
RW/SC
RW
1 = 100 Mbps
0.13
Speed Select
0 = 10 Mbps
This bit is ignored if auto-negotiation is enabled
RW
(Register 0.12 = 1).
1 = Enable auto-negotiation process
0.12
Auto-Negoti-
ation Enable
0 = Disable auto-negotiation process
If enabled, the auto-negotiation result overrides the
RW
settings in Registers 0.13 and 0.8.
1 = Power-down mode
0 = Normal operation
If software reset (Register 0.15) is used to exit
0.11
Power-Down
power-down mode (Register 0.11 = 1), two soft-
ware reset writes (Register 0.15 = 1) are required.
RW
The first write clears power-down mode; the sec-
ond write resets the chip and re-latches the pin
strapping pin values.
0.10
Isolate
1 = Electrical isolation of PHY from MII
0 = Normal operation
RW
0.9
Restart Auto-
Negotiation
1 = Restart auto-negotiation process
0 = Normal operation.
This bit is self-cleared after a ‘1’ is written to it.
RW/SC
0.8
Duplex Mode
1 = Full-duplex
0 = Half-duplex
RW
0.7
Collision Test
1 = Enable COL test
0 = Disable COL test
RW
0.6:0
Reserved Reserved
RO
0
0
Set by the SPEED
strapping pin
(KSZ8091RNB only).
See the Strap-In
Options -
KSZ8091RNB section
for details.
Set by the NWAYEN
strapping pin.
See the Strap-In
Options -
KSZ8091MNX sec-
tion for details.
0
Set by the ISO strap-
ping pin.
See the Strap-In
Options -
KSZ8091MNX sec-
tion for details.
0
The inverse of the
DUPLEX strapping
pin value.
See the Strap-In
Options -
KSZ8091MNX sec-
tion for details.
0
000_0000
DS00002275A-page 42
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