TC54 Datasheet, PDF (4/12 Pages) TelCom Semiconductor, Inc – VOLTAGE DETECTOR

TC54
3.0 DETAILED DESCRIPTION
In normal steady-state operation, when V_IN > V_DET -,
the output will be at a logic high, see Figure 3-1. In the
case of the TC54V, this is an open-drain condition. If
and when the input falls below V_DET -, the output will
pull down (Logic 0) to V_SS. Generally, V_OUT can pull
down to within 0.5V of V_SS at rated output current and
input voltage. (See Section 1.0, Electrical
Characteristics).
FIGURE 3-1:
TIMING DIAGRAM
The output, V_OUT, will stay valid until the input voltage
falls below the minimum operating voltage, V_INMIN, of
0.7V. Below this minimum operating voltage, the output
is undefined. During power-up or anytime V_IN has fallen
below V_INMIN, V_OUT will remain undefined until V_IN rises
above V_INMIN, at which time the output will become
valid. V_OUT will be in its active low state while V_INMIN <
V_IN < V_DET+. (V_DET+ = V_DET - + V_HYST). If and when
the input rises above V_DET+, the output will assume its
inactive state. (High for TC54VC, open-drain for
TC54VN).
V_IN
Detect Voltage V_DET-
Minimum Operating
Voltage
Ground Level
V_DET+
V_HYST
Release Voltage
or RESET Voltage
V_OUT
Output Voltage
Ground Level
4.0 APPLICATIONS INFORMATION
Refer to Microchip Technology Application Note #779,
Using the TC54 Voltage Detector.
DS21434C-page 4
 2002 Microchip Technology Inc.