DSC400 Datasheet, PDF (4/20 Pages) Microchip Technology – Configurable Four Output, Low Jitter Crystal-less™ Clock Generator

DSC400
2.0 PIN DESCRIPTIONS
20 19 18 17 16 15
OE1
1
14 VSS
NC
2
13 VSS
VSS
3
12 NC
VSS
4
11 OE2
5 6 7 8 9 10
FIGURE 2-1:
Pin Configuration, 20-Pin QFN (5.0 mm x 3.2 mm)
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PIN FUNCTION TABLE
Pin Name Pin Type
Description
OE1
NC
V_SS
V_SS
CLK0–
CLK0+
CLK1–
CLK1+
V_DD2
FSB2
OE2
NC
V_SS
V_SS
CLK2–
CLK2+
CLK3–
CLK3+
V_DD1
FSB1
I
N/A
PWR
PWR
O
O
O
O
PWR
I
I
N/A
PWR
PWR
O
O
O
O
PWR
I
Output Enable for Bank1 (CLK0 and CLK3); Active-High. See
Table 3-1.
Leave unconnected or connect to ground.
Ground.
Ground.
Complement output of differential pair 0 (off when in LVCMOS format).
True output of differential pair 0 or LVCMOS output 0.
Complement output of differential pair 1 (off when in LVCMOS format).
True output of differential pair 1 or LVCMOS output 1.
Power Supply for Bank2 (CLK1 and CLK2).
Input for selecting pre-configured frequencies on Bank2 (CLK1 and
CLK2).
Output Enable for Bank2 (CLK1 and CLK2); Active-High. See
Table 3-1.
Leave unconnected or connect to ground.
Ground.
Ground.
Complement output of differential pair 2 (off when in LVCMOS format).
True output of differential pair 2 or LVCMOS output 2.
Complement output of differential pair 3 (off when in LVCMOS format).
True output of differential pair 3 or LVCMOS output 3.
Power Supply for Bank1 (CLK0 and CLK3).
Input for selecting pre-configured frequencies on Bank1 (CLK0 and
CLK3).
DS20005612A-page 4
 2016 Microchip Technology Inc.