AN939 Datasheet, PDF (4/18 Pages) Microchip Technology – Designing Energy Meters with the PIC16F873A

AN939
PHASE ERROR CALIBRATION
Ideally, the relative size of measurement error should
be fairly constant at various PFs, assuming that there
is no phase error. In reality, the CTs introduce a small
phase error that is generally constant in the amount of
current lead or lag they create. The relative size the of
measurement error can vary significantly with the
power factor, however. If we calculate the percentage
of error as ((cosθ) – PF)/PF) × 100), where θ is the
angular difference between the theoretical phase differ-
ence and the error introduced by the CT, we can see
that measurement error from a constant phase error is
much greater at a 0.5 PF (lag) than at UPF.
To show this, assume that a CT introduces a constant
phase error of about 1°, regardless of the power factor.
At UPF, the error is extremely small, on the order of
-0.015% ((cos(1° – 0) – 1.0)/1.0). At 0.5 PF with a 60°
lag, however, the error is significantly larger; as high as
+3% ((cos(60° – 1°) – 0.5)/0.5). This is illustrated in
Figure 2.
To correct for this type of error, we can individually
measure error at UPF and 0.5 PF to come up with a
typical error for the entire range; this can be converted
back to a fixed angular phase error and corrected by
altering the time between the current sample and the
next voltage sample.
As an example, assume that a meter is found to have
an error of +0.2% at UPF and +0.7% at 0.5 PF (current
lag). The difference between the errors is +0.5%. From
our previous equation, the angle x of the phase error at
0.5 PF would be:
(cos(x) – 0.5)/0.5 = 0.005
cos(x) = 0.5025
or x is approximately 59.83°. This requires an additional
lead of 0.17° to get to the desired phase angle of 60°,
which translates to approximately 10 μs for a 50 Hz
waveform. In practical terms, this means delaying the
voltage measurement at t2 by 10 μs. If we assume that
the time between individual conversions is 35 μs, this
means that t2 is actually sampled at 45 μs.
Note:
If errors at UPF and 0.5 PF are equal in
magnitude, phase error correction is not
necessary.
Using a CT by itself normally introduces a current lag,
typically observed at between 2° to 3°. Introducing a
capacitor across the CT, as was done in this design,
provides a current lead that is correctable with timing
adjustment. It is not necessary to quantify the amount
of lead; as long as it is present, it can be measured
indirectly through meter error and compensated.
FIGURE 2:
COMPARING MEASUREMENT ERRORS FOR A CONSTANT PHASE ERROR AT
DIFFERENT POWER FACTORS
At UPF:
I
Current Lead introduced
by Capacitor
Phase Error
At 0.5 PF (lag):
I
Measurement
Error
V
Voltage and
Current
in Phase
Measurement
Error
V
Phase Error
Actual Lag from Phase Error
Predicted Phase Lag at arccos (0.5)
(60°)
DS00939A-page 4
© 2005 Microchip Technology Inc.