24FC256ISN Datasheet, PDF (4/42 Pages) Microchip Technology – 256K I2C™ CMOS Serial EEPROM

24AA256/24LC256/24FC256
AC CHARACTERISTICS (Continued)
Electrical Characteristics:
Industrial (I): VCC = +1.7V to 5.5V
Automotive (E): VCC = +1.7V to 5.5V
TA = -40°C to +85°C
TA = -40°C to +125°C
Param.
No.
Sym.
Characteristic
Min.
Max. Units
Conditions
13
TAA
Output valid from clock
(Note 2)
—
3500
ns 1.7 V  VCC  2.5V
—
900
2.5 V  VCC  5.5V
—
900
1.7V  VCC  2.5V 24FC256
—
400
2.5 V  VCC  5.5V 24FC256
14
TBUF Bus free time: Time the bus
4700
must be free before a new
1300
transmission can start
1300
500
—
ns 1.7V  VCC  2.5V
—
2.5V  VCC  5.5V
—
1.7V  VCC  2.5V 24FC256
—
2.5V  VCC  5.5V 24FC256
15
TOF
Output fall time from VIH
10 + 0.1CB 250
ns All except, 24FC256 (Note 1)
minimum to VIL maximum
250
CB  100 pF
16
TSP
Input filter spike suppression
—
(SDA and SCL pins)
50
ns All except, 24FC256 (Notes 1
and 3)
17
TWC
Write cycle time (byte or
page)
—
5
ms —
18
—
Endurance
1,000,000 — cycles Page mode, 25°C, 5.5V (Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs, which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s web site
at www.microchip.com.
FIGURE 1-1:
BUS TIMING DATA
SCL
SDA
IN
SDA
OUT
WP
5
7
3
6
16
2
8
D3
9
13
4
10
14
(protected)
(unprotected)
11
12
DS20001203T-page 4
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