DSPIC33FJ64GP802-ISP Datasheet, PDF (364/403 Pages) Microchip Technology – High-Performance, 16-bit Digital Signal Controllers

dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
FIGURE 30-24: PARALLEL MASTER PORT READ TIMING DIAGRAM
P1
P2
P3
P4
P1
P2
P3
P4
P1
P2
System
Clock
PMA<13:8>
Address
PMD<7:0>
PMRD
PMWR
PMALL/PMALH
PMCS1
Address <7:0>
PM2
PM3
PM1
PM6
Data
PM7
PM5
TABLE 30-48: PARALLEL MASTER PORT READ TIMING REQUIREMENTS
AC CHARACTERISTICS
Standard Operating Conditions: 3.0V to 3.6V
(unless otherwise stated)
Operating temperature -40°C  TA  +85°C for Industrial
-40°C  TA  +125°C for
Extended
Param
No.
Characteristic
Min.
Typ
Max. Units Conditions
PM1 PMALL/PMALH Pulse-Width
—
0.5 TCY
—
ns
—
PM2 Address Out Valid to PMALL/PMALH Invalid
—
0.75 TCY
—
ns
—
(address setup time)
PM3 PMALL/PMALH Invalid to Address Out Invalid
—
0.25 TCY
—
ns
—
(address hold time)
PM5 PMRD Pulse-Width
—
0.5 TCY
—
ns
—
PM6 PMRD or PMENB Active to Data In Valid (data
—
—
—
ns
—
setup time)
PM7 PMRD or PMENB Inactive to Data In Invalid
—
—
—
ns
—
(data hold time)
DS70292D-page 364
Preliminary
 2009 Microchip Technology Inc.