DSPIC33FJ256GP710-I Datasheet, PDF (318/322 Pages) Microchip Technology – High-Performance,16-Bit Digital Signal Controllers

dsPIC33FJXXXGPX06/X08/X10
SPIxSTAT (SPIx Status and Control) ....................... 172
SR (CPU Status) ................................................... 24, 86
T1CON (Timer1 Control)........................................... 158
TSCON (DCI Transmit Slot Control) ......................... 223
TxCON (T2CON, T4CON, T6CON or T8CON Control) ..
162
TyCON (T3CON, T5CON, T7CON or T9CON Control) ..
163
UxMODE (UARTx Mode) .......................................... 186
UxSTA (UARTx Status and Control) ......................... 188
Reset
Clock Source Selection ............................................... 79
Special Function Register Reset States ..................... 80
Times .......................................................................... 79
Reset Sequence.................................................................. 81
Resets ................................................................................. 77
S
Serial Peripheral Interface (SPI) ....................................... 171
Software Simulator (MPLAB SIM)..................................... 254
Software Stack Pointer, Frame Pointer
CALLL Stack Frame.................................................... 61
Special Features of the CPU............................................. 237
SPI Module
SPI1 Register Map ...................................................... 48
SPI2 Register Map ...................................................... 48
Symbols Used in Opcode Descriptions............................. 246
System Control
Register Map............................................................... 60
T
Temperature and Voltage Specifications
AC ............................................................................. 266
Timer1 ............................................................................... 157
Timer2/3, Timer4/5, Timer6/7 and Timer8/9 ..................... 159
Timing Characteristics
CLKO and I/O ........................................................... 269
Timing Diagrams
10-bit A/D Conversion (CHPS = 01, SIMSAM = 0, ASAM
= 0, SSRC = 000).............................................. 294
10-bit A/D Conversion (CHPS = 01, SIMSAM =
0, ASAM = 1, SSRC = 111, SAMC =
00001)........................................................... 295
12-bit A/D Conversion (ASAM = 0, SSRC = 000) ..... 292
CAN I/O..................................................................... 288
DCI AC-Link Mode .................................................... 287
DCI Multi -Channel, I²S Modes ................................. 285
External Clock ........................................................... 267
I2Cx Bus Data (Master Mode) .................................. 281
I2Cx Bus Data (Slave Mode) .................................... 283
I2Cx Bus Start/Stop Bits (Master Mode) ................... 281
I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 283
Input Capture (CAPx) ............................................... 274
OC/PWM................................................................... 275
Output Compare (OCx)............................................. 274
Reset, Watchdog Timer, Oscillator Start-up Timer and
Power-up Timer ................................................ 270
SPIx Master Mode (CKE = 0) ................................... 276
SPIx Master Mode (CKE = 1) ................................... 277
SPIx Slave Mode (CKE = 0) ..................................... 278
SPIx Slave Mode (CKE = 1) ..................................... 279
Timer1, 2, 3, 4, 5, 6, 7, 8, 9 External Clock .............. 272
Timing Requirements
CLKO and I/O ........................................................... 269
DCI AC-Link Mode............................................ 287, 289
DCI Multi-Channel, I²S Modes.......................... 286, 289
External Clock........................................................... 267
Input Capture ............................................................ 274
Timing Specifications
10-bit A/D Conversion Requirements ....................... 296
12-bit A/D Conversion Requirements ....................... 293
CAN I/O Requirements ............................................. 288
I2Cx Bus Data Requirements (Master Mode)........... 282
I2Cx Bus Data Requirements (Slave Mode)............. 284
Output Compare Requirements................................ 274
PLL Clock ................................................................. 268
Reset, Watchdog Timer, Oscillator Start-up Timer, Pow-
er-up Timer and Brown-out Reset Requirements...
271
Simple OC/PWM Mode Requirements ..................... 275
SPIx Master Mode (CKE = 0) Requirements............ 276
SPIx Master Mode (CKE = 1) Requirements............ 277
SPIx Slave Mode (CKE = 0) Requirements.............. 278
SPIx Slave Mode (CKE = 1) Requirements.............. 280
Timer1 External Clock Requirements ....................... 272
Timer2, Timer4, Timer6 and Timer8 External Clock Re-
quirements........................................................ 273
Timer3, Timer5, Timer7 and Timer9 External Clock Re-
quirements........................................................ 273
U
UART Module
UART1 Register Map.................................................. 48
UART2 Register Map.................................................. 48
V
Voltage Regulator (On-Chip) ............................................ 241
W
Watchdog Timer (WDT)............................................ 237, 242
Programming Considerations ................................... 242
WWW Address ................................................................. 317
WWW, On-Line Support ..................................................... 12
DS70286C-page 316
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