DSPIC33FJXXXGPX06_09 Datasheet, PDF (315/322 Pages) Microchip Technology – High-Performance, 16-Bit Digital Signal Controllers

dsPIC33FJXXXGPX06/X08/X10
INDEX
A
A/D Converter ................................................................... 225
DMA .......................................................................... 225
Initialization ............................................................... 225
Key Features............................................................. 225
AC Characteristics ............................................................ 266
Internal RC Accuracy ................................................ 268
Load Conditions ........................................................ 266
ADC Module
ADC11 Register Map .................................................. 49
ADC2 Register Map .................................................... 49
Alternate Interrupt Vector Table (AIVT) .............................. 81
Arithmetic Logic Unit (ALU)................................................. 27
Assembler
MPASM Assembler................................................... 254
B
Barrel Shifter ....................................................................... 31
Bit-Reversed Addressing .................................................... 64
Example ...................................................................... 65
Implementation ........................................................... 64
Sequence Table (16-Entry)......................................... 65
Block Diagrams
16-bit Timer1 Module ................................................ 157
A/D Module ............................................................... 226
Connections for On-Chip Voltage Regulator............. 241
DCI Module ............................................................... 218
Device Clock ..................................................... 137, 139
DSP Engine ................................................................ 28
dsPIC33F .................................................................... 14
dsPIC33F CPU Core................................................... 22
ECAN Module ........................................................... 192
Input Capture ............................................................ 165
Output Compare ....................................................... 167
PLL............................................................................ 139
Reset System.............................................................. 77
Shared Port Structure ............................................... 155
SPI ............................................................................ 171
Timer2 (16-bit) .......................................................... 161
Timer2/3 (32-bit) ....................................................... 160
UART ........................................................................ 185
Watchdog Timer (WDT) ............................................ 242
C
C Compilers
MPLAB C18 .............................................................. 254
MPLAB C30 .............................................................. 254
Clock Switching................................................................. 145
Enabling .................................................................... 145
Sequence.................................................................. 145
Code Examples
Erasing a Program Memory Page............................... 75
Initiating a Programming Sequence............................ 76
Loading Write Buffers ................................................. 76
Port Write/Read ........................................................ 156
PWRSAV Instruction Syntax..................................... 147
Code Protection ........................................................ 237, 243
Configuration Bits.............................................................. 237
Description (Table).................................................... 238
Configuration Register Map .............................................. 237
Configuring Analog Port Pins ............................................ 156
CPU
Control Register .......................................................... 24
© 2009 Microchip Technology Inc.
CPU Clocking System ...................................................... 138
Options ..................................................................... 138
Selection................................................................... 138
Customer Change Notification Service............................. 317
Customer Notification Service .......................................... 317
Customer Support............................................................. 317
D
Data Accumulators and Adder/Subtractor .......................... 29
Data Space Write Saturation ...................................... 31
Overflow and Saturation ............................................. 29
Round Logic ............................................................... 30
Write Back .................................................................. 30
Data Address Space........................................................... 35
Alignment.................................................................... 35
Memory Map for dsPIC33FJXXXGPX06/X08/X10 Devic-
es with 16 KB RAM............................................. 37
Memory Map for dsPIC33FJXXXGPX06/X08/X10 Devic-
es with 30 KB RAM............................................. 38
Memory Map for dsPIC33FJXXXGPX06/X08/X10 Devic-
es with 8 KB RAM............................................... 36
Near Data Space ........................................................ 35
Software Stack ........................................................... 61
Width .......................................................................... 35
Data Converter Interface (DCI) Module ............................ 217
DC Characteristics............................................................ 258
I/O Pin Input Specifications ...................................... 263
I/O Pin Output Specifications.................................... 264
Idle Current (IIDLE) .................................................... 261
Operating Current (IDD) ............................................ 260
Power-Down Current (IPD)........................................ 262
Program Memory...................................................... 265
Temperature and Voltage Specifications.................. 259
DCI
Buffer Control ........................................................... 217
Buffer Data Alignment .............................................. 217
Introduction............................................................... 217
Transmit/Receive Shift Register ............................... 217
DCI I/O Pins...................................................................... 217
COFS........................................................................ 217
CSCK........................................................................ 217
CSDI ......................................................................... 217
CSDO ....................................................................... 217
DCI Module
Register Map .............................................................. 58
Development Support ....................................................... 253
DMA Module
DMA Register Map ..................................................... 50
DMAC Registers ............................................................... 128
DMAxCNT ................................................................ 128
DMAxCON................................................................ 128
DMAxPAD ................................................................ 128
DMAxREQ ................................................................ 128
DMAxSTA................................................................. 128
DMAxSTB................................................................. 128
DSP Engine ........................................................................ 27
Multiplier ..................................................................... 29
E
ECAN Module
CiFMSKSEL2 register .............................................. 209
ECAN1 Register Map (C1CTRL1.WIN = 0 or 1)......... 52
ECAN1 Register Map (C1CTRL1.WIN = 0)................ 52
ECAN1 Register Map (C1CTRL1.WIN = 1)................ 53
DS70286C-page 313