DSPIC33FJXXXGPX06A_12 Datasheet, PDF(31/362 Page) Microchip Technology – 16-bit Digital Signal Controllers (up to 256 KB Flash and 30 KB SRAM) with Advanced Analog

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

DSPIC33FJXXXGPX06A_12 Datasheet, PDF (31/362 Pages) Microchip Technology – 16-bit Digital Signal Controllers (up to 256 KB Flash and 30 KB SRAM) with Advanced Analog

◁

dsPIC33FJXXXGPX06A/X08A/X10A

REGISTER 3-1: SR: CPU STATUS REGISTER

bit 8

bit 7-5

bit 4

bit 3

bit 2

bit 1

bit 0

DC: MCU ALU Half Carry/Borrow bit

1 = A carry-out from the 4th low-order bit (for byte sized data) or 8th low-order bit (for word sized data)

of the result occurred

0 = No carry-out from the 4th low-order bit (for byte sized data) or 8th low-order bit (for word sized

data) of the result occurred

IPL<2:0>: CPU Interrupt Priority Level Status bits(2)

111 = CPU Interrupt Priority Level is 7 (15), user interrupts disabled

110 = CPU Interrupt Priority Level is 6 (14)

101 = CPU Interrupt Priority Level is 5 (13)

100 = CPU Interrupt Priority Level is 4 (12)

011 = CPU Interrupt Priority Level is 3 (11)

010 = CPU Interrupt Priority Level is 2 (10)

001 = CPU Interrupt Priority Level is 1 (9)

000 = CPU Interrupt Priority Level is 0 (8)

RA: REPEAT Loop Active bit

1 = REPEAT loop in progress

0 = REPEAT loop not in progress

N: MCU ALU Negative bit

1 = Result was negative

0 = Result was non-negative (zero or positive)

OV: MCU ALU Overflow bit

This bit is used for signed arithmetic (2âs complement). It indicates an overflow of the magnitude which

causes the sign bit to change state.

1 = Overflow occurred for signed arithmetic (in this arithmetic operation)

0 = No overflow occurred

Z: MCU ALU Zero bit

1 = An operation which affects the Z bit has set it at some time in the past

0 = The most recent operation which affects the Z bit has cleared it (i.e., a non-zero result)

C: MCU ALU Carry/Borrow bit

1 = A carry-out from the Most Significant bit of the result occurred

0 = No carry-out from the Most Significant bit of the result occurred

Note 1:

2:

3:

This bit may be read or cleared (not set).

The IPL<2:0> bits are concatenated with the IPL<3> bit (CORCON<3>) to form the CPU Interrupt Priority

Level. The value in parentheses indicates the IPL if IPL<3> = 1. User interrupts are disabled when

IPL<3> = 1.

The IPL<2:0> Status bits are read only when NSTDIS = 1 (INTCON1<15>).

ï£ 2009-2012 Microchip Technology Inc.

DS70593D-page 31

▷