HCS412_11 Datasheet, PDF (30/52 Pages) Microchip Technology – KEELOQ® Code Hopping Encoder and Transponder Burglar alarm systems

HCS412
5.0 CONFIGURATION SUMMARY
Table 5-1 summarizes the available HCS412 options.
TABLE 5-1: HCS412 CONFIGURATION SUMMARY
Symbol
Reference
Section
Description
KEY1
64-bit Encoder Key 1
SDVAL
Section 3.2.7 60-bit seed value transmitted in CH Mode if (SEED = 1 AND TMPSD = 0) or if (SEED
= 0 AND TMPSD = 1).
KEY2
LSB 60 bits of Encoder Key 2. 4 MSb’s set to XXXX. (Note 1)
TCODE Section 4.3.3 28-bit Transport Code
AFSK
Section 3.4.5 PLL Interface Select.
0 = ASK
1 = FSK
RFEN
Section 2.2.7 RF Enable output active.
0 = Disable
1 = Enable
LPRE
Section 3.4.7 Long Preamble Enable.
0 = Disable
1 = Enable
QLVS
Section 3.4.8 Special Features Enable.
0 = Disable
1 = Enable
OSCT
Section 2.2.5 Oscillator Tune Value.
1000b
Fastest
0000b
Nominal
0111b
Slowest
VLOWSEL Section 2.2.6 Low Voltage Trip Point Select
0 = 2.2 Volt
1 = 4.4 Volt
IDAMP Section 4.4.3 Intelligent Damping Enable
0 = Enable
1 = Disable
LFSP
Section 4.4 LF Communication Special Features
LFSP1:0
Active Feature
00b
None
01b
Anticollision
10b
Prox Activation
11b
RF Echo
LFBSL
Section 4.2 IFF Baud Rate Select (LFTE)
0 = 200 us
1 = 100 us
MOD
Section 3.3 DATA pin modulation format
0 = PWM
1 = Manch
CWBE
Section 3.4.3 Code word Blanking Enable
0 = Disable
1 = Enable
MTX4
Section 3.4.1 Minimum Four Code words
0 = Disable
1 = Enable
RFBSL
Section 3.3 Transmission Baud Rate (RFTE)
RFBSL1:0 PWM
Manch
00b
400 us
800 us
01b
200 us
400 us
10b
100 us
200 us
11b
100 us
200 us
S2LC
Section 3.4.1 S2/RFEN/LC1 Pin Configuration bit.
0 = LC
1 = S Input
—
Reserved, Set to 0
—
—
TMPSD Section 3.2.7 Temporary Seed Enable (Note 1)
0 = Disable
1 = Enable
SEED
Section 3.2.7 Seed Transmission Enable (Note 1)
0 = Disable
1 = Enable
XSER
Section 3.2.5 Extended Serial number
0 = Disable
1 = Enable
DINC
Section 3.4.4 Delayed Increment
0 = Disable
1 = Enable
DISC
Section 3.2.6 10-bit Discrimination value
OVR
Section 3.2.4 Counter Overflow Value
SER
32-bit Serial Number
USR
64-bit user EEPROM area
CNT
16-bit Synchronization counter
—
Reserved set 0000h
Note 1: If IFF with KEY2 is enabled only if TMPSD = 1 and SEED = 1.
DS41099D-page 30
© 2011 Microchip Technology Inc.