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TC1320_13 Datasheet, PDF (3/16 Pages) Microchip Technology – 8-Bit Digital-to-Analog Converter with Two-Wire Interface
TC1320
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings*
Supply Voltage (VDD) ............................................. +6V
Voltage on any Pin .. (GND – 0.3V) to (VDD + 0.3V)
Current on any Pin ............................................ ±50mA
Package Thermal Resistance (JA)............ 330°C C/W
Operating Temperature (TA)........................ See Below
Storage Temperature (TSTG) .............. -65°C to +150°C
*Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.
TC1320 ELECTRICAL SPECIFICATIONS
Electrical Characteristics: VDD = 2.7V to 5.5V, -40°C  TA  +85°C, VREF = 1.2V unless otherwise noted.
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
Power Supply
VDD
Supply Voltage
IDD
Operating Current
IDD-STANDBY Standby Supply Current
2.7
350
500
—
0.35
0.5
—
0.1
1
Static Performance - Analog Section
Resolution
—
INL
Integral Non-Linearity at FS, TA = +25°C —
FSE
Full Scale Error
—
DNL
Differential Non-Linearity, TA = +25°C
—
VOS
Offset Error at VOUT
—
TCVOS
Offset Error Tempco at VOUT
—
PSRR
Power Supply Rejection Ratio
—
VREF
Voltage Reference Range
0
IREF
Reference Input Leakage Current
—
VSW
Voltage Swing
0
ROUT
Output Resistance @ VOUT
—
IOUT
Output Current (Source or Sink)
—
ISC
Output Short-Circuit Current
—
VDD = 5.5V
—
Dynamic Performance
—
—
—
—
±0.3
10
80
—
—
—
5
2
30
20
8
±2
±3
±0.8
±8
—
—
VDD – 1.2
±1.0
VREF
—
—
50
50
SR
Voltage Output Slew Rate
—
0.8
—
tSETTLE
Output Voltage Full Scale Settling Time
—
10
—
tWU
Wake-up Time
—
20
—
Digital Feed Through and Crosstalk
—
5
—
Serial Port Interface
VIH
Logic Input High
VIL
Logic Input Low
VOL
SDA Output Low
2.4
—
VDD
—
—
0.6
—
—
0.4
—
—
0.6
CIN
Input Capacitance SDA, SCL
—
5
0.4
ILEAK
I/O Leakage
—
—
±1.0
Note 1: SDA and SCL must be connected to VDD or GND.
2: Measured at VOUT 50mV referred to GND to avoid output buffer clipping.
A
mA VDD = 5.5V, VREF = 1.2V
Serial Port Inactive (Note 1)
A VDD = 3.3V
Serial Port Inactive (Note 1)
Bits
LSB
%FS
LSB
mV
v/°C
dB
V
A
V

mA
mA
mA
(Note 2)
All Codes (Note 2)
(Note 2)
VDD at DC
VREF  (VDD – 1.2V)
ROUT ()
Source
Sink
V/s
sec
s
nV-s
SDA = VDD, SCL = 100kHz
V
—
V IOL = 3mA (Sinking Current)
V IOL = 6mA
pF
A
 2002-2012 Microchip Technology Inc.
DS21386C-page 3