24C02CT Datasheet, PDF (3/28 Pages) Microchip Technology – 2K 5.0V I2C Serial EEPROM

24C02C
TABLE 1-2: AC CHARACTERISTICS
All parameters apply across the
specified operating ranges unless
otherwise noted.
VCC = +4.5V to +5.5V
Industrial (I):
TA = -40°C to +85°C
Automotive (E): TA = -40°C to +125°C
Parameter
TA > +85°C
Symbol
Min. Max.
-40°C ≤ TA ≤ +85°C
Min.
Max.
Units
Remarks
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
SDA and SCL fall time
Start condition hold time
FCLK
THIGH
TLOW
TR
TF
THD:STA
—
4000
4700
—
—
4000
100
—
—
1000
300
—
—
600
1300
—
—
600
400 kHz
—
ns
—
ns
300
ns (Note 1)
300
ns (Note 1)
—
ns After this period the first
clock pulse is generated
Start condition setup time TSU:STA 4700 —
600
—
ns Only relevant for repeated
Start condition
Data input hold time
THD:DAT
0
—
0
—
ns (Note 2)
Data input setup time
TSU:DAT 250
—
100
—
ns
Stop condition setup time TSU:STO 4000 —
600
—
ns
Output valid from clock
TAA
— 3500
—
900
ns (Note 2)
Bus free time
TBUF
4700 —
1300
—
ns Time the bus must be free
before a new transmission
can start
Output fall time from VIH
TOF
minimum to VIL maximum
— 250 20 + 0.1 CB 250
ns (Note 1), CB ≤ 100 pF
Input filter spike suppression TSP
(SDA and SCL pins)
—
50
—
50
ns (Note 3)
Write cycle time
TWR
—
1.5
—
1
ms Byte or Page mode
Endurance
1M
—
1M
— cycles 25°C, VCC = 5.0V, Block
mode (Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined TSP and VHYS specifications are due to Schmitt Trigger inputs which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site
at www.microchip.com.
FIGURE 1-1:
BUS TIMING DATA
SCL
SDA
IN
SDA
OUT
TF
TSU:STA
THD:STA
TSP
TLOW
THIGH
THD:DAT
TR
TSU:DAT
TSU:STO
TAA
TBUF
© 2008 Microchip Technology Inc.
DS21202H-page 3