24AA00_11 Datasheet, PDF (3/34 Pages) Microchip Technology – 128-Bit I2C™ Bus Serial EEPROM

24AA00/24LC00/24C00
TABLE 1-2: AC CHARACTERISTICS
All Parameters apply across all
recommended operating ranges
unless otherwise noted
Industrial (I):
Automotive (E):
TA = -40°C to +85°C, VCC = 1.8V to 5.5V
TA = -40°C to +125°C, VCC = 4.5V to 5.5V
Parameter
Symbol Min Max Units
Conditions
Clock frequency
FCLK
—
100 kHz 4.5V Vcc  5.5V (E Temp range)
—
100
1.8V Vcc 4.5V
—
400
4.5V Vcc  5.5V
Clock high time
THIGH
4000 —
4000 —
600
—
ns 4.5V Vcc  5.5V (E Temp range)
1.8V Vcc 4.5V
4.5V Vcc  5.5V
Clock low time
TLOW
4700 —
4700 —
1300 —
ns 4.5V Vcc  5.5V (E Temp range)
1.8V Vcc 4.5V
4.5V Vcc  5.5V
SDA and SCL rise time
TR
— 1000 ns 4.5V Vcc  5.5V (E Temp range)
(Note 1)
— 1000
1.8V Vcc 4.5V
—
300
4.5V Vcc  5.5V
SDA and SCL fall time
TF
—
300
ns (Note 1)
Start condition hold time
THD:STA 4000
—
4000 —
600
—
ns 4.5V Vcc  5.5V (E Temp range)
1.8V Vcc 4.5V
4.5V Vcc  5.5V
Start condition setup time
TSU:STA 4700
—
4700 —
600
—
ns 4.5V Vcc  5.5V (E Temp range)
1.8V Vcc 4.5V
4.5V Vcc  5.5V
Data input hold time
THD:DAT
0
—
ns (Note 2)
Data input setup time
TSU:DAT
250
—
ns 4.5V Vcc  5.5V (E Temp range)
250
—
1.8V Vcc 4.5V
100
—
4.5V Vcc  5.5V
Stop condition setup time
TSU:STO 4000
—
4000 —
600
—
ns 4.5V Vcc  5.5V (E Temp range)
1.8V Vcc 4.5V
4.5V Vcc  5.5V
Output valid from clock
(Note 2)
TAA
— 3500 ns 4.5V Vcc  5.5V (E Temp range)
— 3500
1.8V Vcc 4.5V
—
900
4.5V Vcc  5.5V
Bus free time: Time the bus must TBUF
be free before a new transmis-
sion can start
4700 —
4700 —
1300 —
ns 4.5V Vcc  5.5V (E Temp range)
1.8V Vcc 4.5V
4.5V Vcc  5.5V
Output fall time from VIH
minimum to VIL maximum
TOF
20+0.1 250
ns (Note 1), CB 100 pF
CB
Input filter spike suppression
TSP
(SDA and SCL pins)
—
50
ns (Notes 1, 3)
Write cycle time
TWC
—
4
ms
Endurance
1M
— cycles (Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained at www.microchip.com.
 1996-2011 Microchip Technology Inc.
DS21178H-page 3