DSPIC33FJ256MC710A-I Datasheet, PDF (266/374 Pages) Microchip Technology – 16-bit Digital Signal Controllers (up to 256 KB Flash and 30 KB SRAM) with Motor Control and Advanced Analog

dsPIC33FJXXXMCX06A/X08A/X10A
23.5 JTAG Interface
dsPIC33FJXXXMCX06A/X08A/X10A devices imple-
ment a JTAG interface, which supports boundary scan
device testing, as well as in-circuit programming.
Detailed information on the interface will be provided in
future revisions of the document.
23.6 Code Protection and
CodeGuard™ Security
The dsPIC33FJXXXMCX06A/X08A/X10A devices
offer the advanced implementation of CodeGuard™
Security. CodeGuard Security enables multiple parties
to securely share resources (memory, interrupts and
peripherals) on a single chip. This feature helps protect
individual Intellectual Property (IP) in collaborative
system designs.
When coupled with software encryption libraries,
CodeGuard™ Security can be used to securely update
Flash even when multiple IPs are resident on the single
chip. The code protection features vary depending on
the actual device implemented. The following sections
provide an overview of these features.
The code protection features are controlled by the
Configuration registers: FBS, FSS and FGS.
Note:
Refer to Section 23. “CodeGuard™
Security” (DS70199) in the “dsPIC33F/
PIC24H Family Reference Manual” for
further information on usage,
configuration and operation of
CodeGuard Security.
23.7 In-Circuit Serial Programming
dsPIC33FJXXXMCX06A/X08A/X10A family digital
signal controllers can be serially programmed while in
the end application circuit. This is simply done with two
lines for clock and data, and three other lines for power,
ground and the programming sequence. This allows
customers to manufacture boards with unprogrammed
devices and then program the digital signal controller
just before shipping the product. This also allows the
most recent firmware, or a custom firmware, to be
programmed. Please refer to the “dsPIC33F/PIC24H
Flash Programming Specification” (DS70152)
document for details about ICSP.
Any one out of three pairs of programming clock/data
pins may be used:
• PGEC1 and PGED1
• PGEC2 and PGED2
• PGEC3 and PGED3
23.8 In-Circuit Debugger
When MPLAB^® ICD 2 is selected as a debugger, the
in-circuit debugging functionality is enabled. This func-
tion allows simple debugging functions when used with
MPLAB IDE. Debugging functionality is controlled
through the PGECx (Emulation/Debug Clock) and
PGEDx (Emulation/Debug Data) pin functions.
Any one out of three pairs of debugging clock/data pins
may be used:
• PGEC1 and PGED1
• PGEC2 and PGED2
• PGEC3 and PGED3
To use the in-circuit debugger function of the device,
the design must implement ICSP connections to
MCLR, VDD, VSS and the PGECx/PGEDx pin pair. In
addition, when the feature is enabled, some of the
resources are not available for general use. These
resources include the first 80 bytes of data RAM and
two I/O pins.
DS70594D-page 266
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