MCP3428-ESL Datasheet, PDF (26/56 Pages) Microchip Technology – 16-Bit, Multi-Channel ΔΣ Analog-to-Digital Converter with I2C™ Interface and On-Board Reference

MCP3426/7/8
TABLE 5-5: I²C SERIAL TIMING SPECIFICATIONS
Electrical Specifications: Unless otherwise specified, all limits are specified for T_A = -40 to +85°C, V_DD = +2.7V to +5.0V,
V_SS = 0V, CHn+ = CHn- = V_REF/2.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Standard Mode (100 kHz)
Clock frequency
f_SCL
0
—
100
kHz
Clock high time
THIGH
4000
—
—
ns
Clock low time
TLOW
4700
—
—
ns
SDA and SCL rise time
TR
—
—
1000
ns From V_IL to V_IH (Note 1)
SDA and SCL fall time
TF
—
—
300
ns From V_IH to V_IL (Note 1)
START condition hold time
THD:STA
4000
—
—
ns After this period, the first clock
pulse is generated.
Repeated START condition
TSU:STA
4700
—
setup time
—
ns Only relevant for repeated Start
condition
Data hold time
THD:DAT
0
—
3450
ns (Note 3)
Data input setup time
TSU:DAT
250
—
—
ns
STOP condition setup time
TSU:STO
4000
—
—
ns
Output valid from clock
TAA
0
—
3750
ns (Note 2, Note 3)
Bus free time
TBUF
4700
—
—
ns Time between START and STOP
conditions.
Fast Mode (400 kHz)
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
SDA and SCL fall time
START condition hold time
TSCL
0
—
THIGH
600
—
TLOW
1300
—
TR
20 + 0.1C_b
—
TF
20 + 0.1C_b
—
THD:STA
600
—
400
kHz
—
ns
—
ns
300
ns From V_IL to V_IH (Note 1)
300
ns From V_IH to V_IL (Note 1)
—
ns After this period, the first clock
pulse is generated
Repeated START condition
TSU:STA
600
—
setup time
—
ns Only relevant for repeated Start
condition
Data hold time
THD:DAT
0
—
900
ns (Note 4)
Data input setup time
TSU:DAT
100
—
—
ns
STOP condition setup time
TSU:STO
600
—
—
ns
Output valid from clock
TAA
0
—
1200
ns (Note 2, Note 3)
Bus free time
TBUF
1300
—
—
ns Time between START and STOP
conditions.
Input filter spike suppression
TSP
0
—
50
ns SDA and SCL pins (Note 5)
Note 1:
2:
3:
This parameter is ensured by characterization and not 100% tested.
This specification is not a part of the I²C specification. This specification is equivalent to the Data Hold Time (THD:DAT)
plus SDA Fall (or rise) time: TAA = T_HD:DAT + T_F (OR T_R).
If this parameter is too short, it can create an unintended Start or Stop condition to other devices on the bus line. If this
parameter is too long, Clock Low time (T_LOW) can be affected.
4: For Data Input: This parameter must be longer than t_SP. If this parameter is too long, the Data Input Setup (T_SU:DAT) or
Clock Low time (T_LOW) can be affected.
For Data Output: This parameter is characterized, and tested indirectly by testing T_AA parameter.
5: This parameter is ensured by characterization and not 100% tested. This parameter is not available for Standard Mode.
DS22226A-page 26
© 2009 Microchip Technology Inc.