USB3320C-EZK-TR Datasheet, PDF (25/82 Pages) Microchip Technology – Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver

Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver
Datasheet
Table 5.1 DP/DM Termination vs. Signaling Mode (continued)
ULPI REGISTER SETTINGS
USB3320 TERMINATION
RESISTOR SETTINGS
SIGNALING MODE
Host LS Resume
Host Test J/Test_K
Peripheral Settings
Peripheral Chirp
Peripheral HS
Peripheral FS
Peripheral HS/FS Suspend
Peripheral HS/FS Resume
Peripheral LS
Peripheral LS Suspend
Peripheral LS Resume
Peripheral Test J/Test K
OTG device, Peripheral Chirp
OTG device, Peripheral HS
OTG device, Peripheral FS
OTG device, Peripheral HS/FS Suspend
OTG device, Peripheral HS/FS Resume
OTG device, Peripheral Test J/Test K
Any combination not defined above
Note 5.1
10b 1b 10b 1b 1b 0b 0b 1b 1b 0b
00b 0b 10b 1b 1b 0b 0b 1b 1b 1b
00b 1b 10b 0b 0b 1b 0b 0b 0b 0b
00b 0b 00b 0b 0b 0b 0b 0b 0b 1b
01b 1b 00b 0b 0b 1b 0b 0b 0b 0b
01b 1b 00b 0b 0b 1b 0b 0b 0b 0b
01b 1b 10b 0b 0b 1b 0b 0b 0b 0b
10b 1b 00b 0b 0b 0b 1b 0b 0b 0b
10b 1b 00b 0b 0b 0b 1b 0b 0b 0b
10b 1b 10b 0b 0b 0b 1b 0b 0b 0b
00b 0b 10b 0b 0b 0b 0b 0b 0b 1b
00b 1b 10b 0b 1b 1b 0b 0b 1b 0b
00b 0b 00b 0b 1b 0b 0b 0b 1b 1b
01b 1b 00b 0b 1b 1b 0b 0b 1b 0b
01b 1b 00b 0b 1b 1b 0b 0b 1b 0b
01b 1b 10b 0b 1b 1b 0b 0b 1b 0b
00b 0b 10b 0b 1b 0b 0b 0b 1b 1b
0b 0b 0b 0b 0b
Note: This is the same as Table 40, Section 4.4 of the ULPI 1.1 specification.
Note: USB3320 does not support operation as an upstream hub port. See Section 6.2.4.3, "UTMI+
Level 3".
Note 5.1 The transceiver operation is not guaranteed in a combination that is not defined.
The USB3320 uses the 27% resistor ECN resistor tolerances. The resistor values are shown in
Table 4.5.
SMSC USB3320
25
DATASHEET
Revision 1.0 (07-14-09)