MCP621 Datasheet, PDF (25/44 Pages) Microchip Technology – 20 MHz, 2.5 mA Op Amps with mCal

4.4 Improving Stability
4.4.1 CAPACITIVE LOADS
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. See Figure 2-30. A unity gain buffer (G = +1)
is the most sensitive to capacitive loads, though all
gains show the same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 10 pF when G = +1), a small series
resistor at the output (R_ISO in Figure 4-9) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitive load.
R_G
R_F
R_ISO
V_OUT
C_L
R_N
MCP62X
FIGURE 4-9:
Output Resistor, R_ISO
Stabilizes Large Capacitive Loads.
Figure 4-10 gives recommended R_ISO values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (C_L/G_N), where G_N is the
circuit’s noise gain. For non-inverting gains, G_N and the
Signal Gain are equal. For inverting gains, G_N is
1+|Signal Gain| (e.g., -1 V/V gives G_N = +2 V/V).
1,000
100
10
1
1.1Ep-12
G_N = +1
G_N ≥ +2
1.1E0-p11
11.E0-01p0
1.E1n-09
Normalized Capacitance; C_L/G_N (F)
1.1E0-n08
FIGURE 4-10:
Recommended R_ISO Values
for Capacitive Loads.
After selecting R_ISO for your circuit, double check the
resulting frequency response peaking and step
response overshoot. Modify R_ISO’s value until the
response is reasonable. Bench evaluation and
simulations with the MCP621/2/5 SPICE macro model
are helpful.
© 2009 Microchip Technology Inc.
MCP621/2/5
4.4.2 GAIN PEAKING
Figure 4-11 shows an op amp circuit that represents
non-inverting amplifiers (V_M is a DC voltage and V_P is
the input) or inverting amplifiers (V_P is a DC voltage
and V_M is the input). The capacitances C_N and C_G
represent the total capacitance at the input pins; they
include the op amp’s common mode input capacitance
(C_CM), board parasitic capacitance and any capacitor
placed in parallel.
R_N
C_N
MCP62X
V_P
V_OUT
V_M
R_{G CG} R_F
FIGURE 4-11:
Capacitance.
Amplifier with Parasitic
C_G acts in parallel with R_G (except for a gain of +1 V/V),
which causes an increase in gain at high frequencies.
C_G also reduces the phase margin of the feedback
loop, which becomes less stable. This effect can be
reduced by either reducing C_G or R_F.
C_N and R_N form a low-pass filter that affects the signal
at V_P. This filter has a single real pole at 1/(2πR_NC_N).
The largest value of R_F that should be used depends
on noise gain (see G_N in Section 4.4.1 “Capacitive
Loads”) and C_G. Figure 4-12 shows the maximum
recommended R_F for several C_G values.
1.E1+0005k
1.E+1004k
C_G = 10 pF
C_G = 32 pF
C_G = 100 pF
C_G = 320 pF
C_G = 1 nF
1.E+013k
1.E+10020
1
G_N > +1 V/V
10
100
Noise Gain; G_N (V/V)
FIGURE 4-12:
R_F vs. Gain.
Maximum Recommended
Figure 2-37 and Figure 2-38 show the small signal and
large signal step responses at G = +1 V/V. The unity
gain buffer usually has R_F = 0Ω and R_G open.
Figure 2-39 and Figure 2-40 show the small signal and
large signal step responses at G = -1 V/V. Since the
noise gain is 2 V/V and C_G ≈ 10 pF, the resistors were
chosen to be R_F = R_G = 1kΩ and R_N = 500Ω.
DS22188A-page 25