PIC12F1840_11 Datasheet, PDF (24/382 Pages) Microchip Technology – 8-Pin Flash Microcontrollers with nanoWatt XLP Technology

PIC12(L)F1840
TABLE 3-7: SPECIAL FUNCTION REGISTER SUMMARY
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Bank 0
000h⁽¹⁾ INDF0
Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
001h⁽¹⁾ INDF1
Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
002h⁽¹⁾ PCL
Program Counter (PC) Least Significant Byte
0000 0000 0000 0000
003h⁽¹⁾ STATUS
—
—
—
TO
PD
Z
DC
C
---1 1000 ---q quuu
004h⁽¹⁾ FSR0L
Indirect Data Memory Address 0 Low Pointer
0000 0000 uuuu uuuu
005h⁽¹⁾ FSR0H
Indirect Data Memory Address 0 High Pointer
0000 0000 0000 0000
006h⁽¹⁾ FSR1L
Indirect Data Memory Address 1 Low Pointer
0000 0000 uuuu uuuu
007h⁽¹⁾ FSR1H
Indirect Data Memory Address 1 High Pointer
0000 0000 0000 0000
008h⁽¹⁾ BSR
—
—
—
BSR<4:0>
---0 0000 ---0 0000
009h⁽¹⁾ WREG
Working Register
0000 0000 uuuu uuuu
00Ah⁽¹⁾ PCLATH
—
Write Buffer for the upper 7 bits of the Program Counter
-000 0000 -000 0000
00Bh⁽¹⁾ INTCON
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
INTF
IOCIF 0000 000x 0000 000u
00Ch PORTA
—
—
RA5
RA4
RA3
RA2
RA1
RA0 --xx xxxx --xx xxxx
00Dh —
Unimplemented
—
—
00Eh —
Unimplemented
—
—
00Fh —
Unimplemented
—
—
010h —
Unimplemented
—
—
011h PIR1
TMR1GIF
ADIF
RCIF
TXIF
SSP1IF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
012h PIR2
OSFIF
—
C1IF
EEIF
BCL1IF
—
—
—
0-00 0--- 0-00 0---
013h —
Unimplemented
—
—
014h —
Unimplemented
—
—
015h TMR0
Timer0 Module Register
xxxx xxxx uuuu uuuu
016h TMR1L
Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
xxxx xxxx uuuu uuuu
017h TMR1H
Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
xxxx xxxx uuuu uuuu
018h T1CON
TMR1CS1 TMR1CS0
T1CKPS<1:0>
T1OSCEN T1SYNC
—
TMR1ON 0000 00-0 uuuu uu-u
019h T1GCON
TMR1GE T1GPOL
T1GTM
T1GSPM
T1GGO/
DONE
T1GVAL
T1GSS<1:0>
0000 0x00 uuuu uxuu
01Ah TMR2
Timer2 Module Register
0000 0000 0000 0000
01Bh PR2
Timer2 Period Register
1111 1111 1111 1111
01Ch T2CON
—
T2OUTPS<3:0>
TMR2ON
T2CKPS<1:0>
-000 0000 -000 0000
01Dh —
Unimplemented
—
—
01Eh CPSCON0
CPSON
CPSRM
—
—
CPSRNG<1:0>
CPSOUT T0XCS 00-- 0000 00-- 0000
01Fh CPSCON1
—
—
—
—
—
—
CPSCH<1:0>
---- --00 ---- --00
Legend:
Note 1:
2:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
These registers can be addressed from any bank.
PIC12F1840 only.
DS41441B-page 24
Preliminary
 2011 Microchip Technology Inc.