KSZ8091RNA Datasheet, PDF (22/62 Pages) Micrel Semiconductor – 10Base-T/100Base-TX Physical Layer Transceiver

KSZ8091RNA/RND
3.9.1 NAND TREE I/O TESTING
Use the following procedure to check for faults on the KSZ8091RNA/RND digital I/O pin connections to the board:
1. Enable NAND tree mode by setting Register 16h, Bit [5] to ‘1’.
2. Use board logic to drive all KSZ8091RNA/RND NAND tree input pins high.
3. Use board logic to drive each NAND tree input pin, in KSZ8091RNA/RND NAND tree pin order, as follows:
a) Toggle the first pin (MDIO) from high to low, and verify that the TXD1 pin switches from high to low to indicate
that the first pin is connected properly.
b) Leave the first pin (MDIO) low.
c) Toggle the second pin (MDC) from high to low, and verify that the TXD1 pin switches from low to high to
indicate that the second pin is connected properly.
d) Leave the first pin (MDIO) and the second pin (MDC) low.
e) Toggle the third pin (RXD1) from high to low, and verify that the TXD1 pin switches from high to low to indi-
cate that the third pin is connected properly.
f) Continue with this sequence until all KSZ8091RNA/RND NAND tree input pins have been toggled.
Each KSZ8091RNA/RND NAND tree input pin must cause the TXD1 output pin to toggle high-to-low or low-to-high to
indicate a good connection. If the TXD1 pin fails to toggle when the KSZ8091RNA/RND input pin toggles from high to
low, the input pin has a fault.
3.10 Power Management
The KSZ8091RNA/RND incorporates a number of power-management modes and features that provide methods to
consume less energy. These are discussed in the following sections.
3.10.1 POWER-SAVING MODE
Power-saving mode is used to reduce the transceiver power consumption when the cable is unplugged. It is enabled
by writing a ‘1’ to Register 1Fh, Bit [10], and is in effect when Auto-Negotiation mode is enabled and the cable is dis-
connected (no link).
In this mode, the KSZ8091RNA/RND shuts down all transceiver blocks, except for the transmitter, energy detect, and
PLL circuits.
By default, power-saving mode is disabled after power-up.
3.10.2 ENERGY-DETECT POWER-DOWN MODE
Energy-detect power-down (EDPD) mode is used to further reduce transceiver power consumption when the cable is
unplugged. It is enabled by writing a ‘0’ to Register 18h, Bit [11], and is in effect when Auto-Negotiation mode is enabled
and the cable is disconnected (no link).
EDPD mode works with the PLL off (set by writing a ‘1’ to Register 10h, Bit [4] to automatically turn the PLL off in EDPD
mode) to turn off all KSZ8091RNA/RND transceiver blocks except the transmitter and energy-detect circuits.
Power can be reduced further by extending the time interval between transmissions of link pulses to check for the pres-
ence of a link partner. The periodic transmission of link pulses is needed to ensure the KSZ8091RNA/RND and its link
partner, when operating in the same low-power state and with Auto MDI/MDI-X disabled, can wake up when the cable
is connected between them.
By default, EDPD mode is disabled after power-up.
3.10.3 POWER-DOWN MODE
Power-down mode is used to power down the KSZ8091RNA/RND device when it is not in use after power-up. It is
enabled by writing a ‘1’ to Register 0h, Bit [11].
In this mode, the KSZ8091RNA/RND disables all internal functions except the MII management interface. The
KSZ8091RNA/RND exits (disables) power-down mode after Register 0h, Bit [11] is set back to ‘0’.
3.10.4 SLOW-OSCILLATOR MODE
Slow-oscillator mode is used to disconnect the input reference crystal/clock on XI (Pin 8) and select the on-chip slow
oscillator when the KSZ8091RNA/RND device is not in use after power-up. It is enabled by writing a ‘1’ to Register 11h,
Bit [5].
DS00002298A-page 22
 2016 Microchip Technology Inc.