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DSPIC33FJXXXMCX06A_13 Datasheet, PDF (213/374 Pages) Microchip Technology – 16-bit Digital Signal Controllers up to 256 KB Flash and30 KB SRAM with Motor Control and Advanced Analog | |||
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dsPIC33FJXXXMCX06A/X08A/X10A
20.3
UART Control Registers
REGISTER 20-1: UxMODE: UARTx MODE REGISTER
R/W-0
U-0
UARTEN(1)
â
bit 15
R/W-0
R/W-0
R/W-0
U-0
USIDL
IREN(2)
RTSMD
â
R/W-0
R/W-0
UEN<1:0>
bit 8
R/W-0, HC
WAKE
bit 7
R/W-0
LPBACK
R/W-0, HC
ABAUD
R/W-0
URXINV
R/W-0
BRGH
R/W-0
R/W-0
PDSEL<1:0>
R/W-0
STSEL
bit 0
Legend:
R = Readable bit
-n = Value at POR
HC = Hardware Clearable bit
W = Writable bit
U = Unimplemented bit, read as â0â
â1â = Bit is set
â0â = Bit is cleared
x = Bit is unknown
bit 15
UARTEN: UARTx Enable bit(1)
1 = UARTx is enabled; all UARTx pins are controlled by UARTx as defined by UEN<1:0>
0 = UARTx is disabled; all UARTx pins are controlled by port latches; UARTx power consumption is
minimal
bit 14
Unimplemented: Read as â0â
bit 13
USIDL: Stop in Idle Mode bit
bit 12
1 = Discontinue module operation when device enters Idle mode.
0 = Continue module operation in Idle mode
IREN: IrDA® Encoder and Decoder Enable bit(2)
1 = IrDA encoder and decoder enabled
0 = IrDA encoder and decoder disabled
bit 11
RTSMD: Mode Selection for UxRTS Pin bit
1 = UxRTS pin in Simplex mode
0 = UxRTS pin in Flow Control mode
bit 10
Unimplemented: Read as â0â
bit 9-8
UEN<1:0>: UARTx Enable bits
11 = UxTX, UxRX and BCLK pins are enabled and used; UxCTS pin controlled by port latches
10 = UxTX, UxRX, UxCTS and UxRTS pins are enabled and used
01 = UxTX, UxRX and UxRTS pins are enabled and used; UxCTS pin controlled by port latches
00 = UxTX and UxRX pins are enabled and used and UxRTS/BCLK pins controlled by port latches
bit 7
WAKE: Wake-up on Start bit Detect During Sleep Mode Enable bit
1 = UARTx will continue to sample the UxRX pin. Interrupt generated on the falling edge; bit cleared
in hardware on the following rising edge.
0 = No wake-up enabled
bit 6
LPBACK: UARTx Loopback Mode Select bit
1 = Enable Loopback mode
0 = Loopback mode is disabled
bit 5
ABAUD: Auto-Baud Enable bit
1 = Enable baud rate measurement on the next character â requires reception of a Sync field (0x55)
before other data; cleared in hardware upon completion
0 = Baud rate measurement disabled or completed
Note 1: Refer to Section 17. âUARTâ (DS70188) in the âdsPIC33F/PIC24H Family Reference Manualâ for
information on enabling the UART module for receive or transmit operation.
2: This feature is only available for the 16x BRG mode (BRGH = 0).
ï£ 2009-2012 Microchip Technology Inc.
DS70594D-page 213
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