English
Language : 

USB3450 Datasheet, PDF (21/39 Pages) SMSC Corporation – HI-SPEED USB HOST OR DEVICE PHY WITH UTMI+INTERFACE
USB3450
6.0 APPLICATION NOTES
The following sections consist of select functional explanations to aid in implementing the USB3450 into a system. For
complete description and specifications consult the Hi-Speed Transceiver Macrocell Interface Specification and Univer-
sal Serial Bus Specification Revision 2.0.
6.1 Linestate
The voltage thresholds that the LINESTATE[1:0] signals use to reflect the state of DP and DM depend on the state of
XCVRSELECT. LINESTATE[1:0] uses HS thresholds when the HS transceiver is enabled (XCVRSELECT = 0) and FS
thresholds when the FS transceiver is enabled (XCVRSELECT = 1). There is not a concept of variable single-ended
thresholds in the Hi-Speed specification for HS mode.
The HS receiver is used to detect Chirp J or K, where the output of the HS receiver is always qualified with the Squelch
signal. If squelched, the output of the HS receiver is ignored. In the USB3450, as an alternative to using variable thresh-
olds for the single-ended receivers, the following approach is used.
TABLE 6-1: LINESTATE STATES
State of DP/DM Lines
Linestate[1:0]
LS[1]
0
0
LS[0]
0
1
1
0
1
1
Full Speed
XCVRSELECT =1
TERMSELECT=1
SE0
J
K
SE1
High Speed
XCVRSELECT =0
TERMSELECT=0
Squelch
Squelch
Invalid
Invalid
Chirp Mode
XCVRSELECT =0
TERMSELECT=1
Squelch
Squelch &
HS Diff. Receiver Output
Squelch &
HS Diff. Receiver Output
Invalid
In HS mode, 3ms of no USB activity (IDLE state) signals a reset. The Link monitors LINESTATE[1:0] for the IDLE state.
To minimize transitions on LINESTATE[1:0] while in HS mode, the presence of Squelch is used to force LINESTATE[1:0]
to a J state.
6.2 OPMODES
The OPMODE[1:0] pins allow control of the operating modes.
TABLE 6-2:
Mode[1:0]
00
01
10
11
OPERATIONAL MODES
State#
State Name
Description
0
Normal Operation Transceiver operates with normal USB data encoding and
decoding
1
Non-Driving
Allows the transceiver logic to support a soft disconnect feature
which tri-states both the HS and FS transmitters, and removes
any termination from the USB making it appear to an upstream
port that the device has been disconnected from the bus
2
Disable Bit Stuffing Disables bitstuffing and NRZI encoding logic so that 1's loaded
and NRZI encoding from the DATA bus become 'J's on the DP/DM and 0's become
'K's
3
Reserved
N/A
The OPMODE[1:0] signals are normally changed only when the transmitter and the receiver are quiescent, i.e. when
entering a test mode or for a device initiated resume.
When using OPMODE[1:0] = 10 the SYNC and EOP patterns are not transmitted.
 2005 - 2016 Microchip Technology Inc.
DS00002105A-page 21