MCP4725_09 Datasheet, PDF (21/50 Pages) Microchip Technology – 12-Bit Digital-to-Analog Converter with EEPROM Memory in SOT-23-6

MCP4725
5.6 Non-Volatile EEPROM Memory
The MCP4725 device has a 14-bit wide EEPROM
memory to store configuration bit (2 bits) and DAC
input data (12 bits). These bits are readable and re-
writable with I²C interface commands. The device has
an on-chip charge pump circuit to write the EEPROM
memory bits without using an external program
voltage.
The EEPROM writing operation is initiated when the
device receives an EEPROM write command (C2 = 0,
C1 = 1, C0 = 1). The configuration and writing data bits
are transferred to the EEPROM memory block. A
status bit, RDY/BSY, stays low during the EEPROM
writing and goes high as the write operation is
completed. While the RDY/BSY bit is low (during the
EEPROM writing), any new write command is ignored
(for EEPROM or DAC register). Table 5-3 shows the
EEPROM bits and factory default settings. Table 5-4
shows the DAC input register bits of the MCP4725.
TABLE 5-3: EEPROM MEMORY AND FACTORY DEFAULT SETTINGS
(TOTAL NUMBER OF BITS: 14 BITS)
Bit
Name
PD1 PD0 D11 D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
Function
Power-Down
Select
(2 bits)
DAC Input Data (12 bits)
Factory
Default
0
0 ⁽¹⁾ 1 ⁽²⁾
0
0
0
0
0
0
0
0
0
0
0
Value
Note 1: See Table 5-2 for details.
2: Bit D11 = ‘1’ (while all other bits are “0”) enables the device to output 0.5 * V_DD (= middle scale output).
TABLE 5-4: DAC REGISTER
Bit
Name
C2 C1 C0 ^RDY/ POR PD1 PD0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
BSY
Bit
Function
Command
Type
(1)
Power-
Down
Select
Data (12 bits)
Note 1: Write EEPROM status indication bit (0:EEPROM write is not completed. 1:EEPROM write is complete.)
© 2009 Microchip Technology Inc.
DS22039D-page 21