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TC1303A Datasheet, PDF (20/36 Pages) Microchip Technology – 500 mA Synchronous Buck Regulator, + 300 mA LDO with Power-Good Output
TC1303A/TC1303B/TC1303C/TC1304
4.0 DETAILED DESCRIPTION
4.1 Device Overview
The TC1303/TC1304 combines a 500 mA synchro-
nous buck regulator with a 300 mA LDO and a power-
good output. This unique combination provides a small,
low-cost solution for applications that require two or
more voltage rails. The buck regulator can deliver high-
output current over a wide range of input-to-output
voltage ratios while maintaining high efficiency. This is
typically used for the lower-voltage, high-current
processor core. The LDO is a minimal parts-count
solution (single-output capacitor), providing a regulated
voltage for an auxiliary rail. The typical LDO dropout
voltage (137 mV @ 200 mA) allows the use of very low
input-to-output LDO differential voltages, minimizing
the power loss internal to the LDO pass transistor. A
power-good output is provided, indicating that the buck
regulator output, the LDO output or both outputs are in
regulation. Additional features include independent
shutdown inputs (TC1303), UVLO, output voltage
sequencing
(TC1304),
overcurrent
and
overtemperature shutdown.
4.2 Synchronous Buck Regulator
The synchronous buck regulator is capable of supply-
ing a 500 mA continuous output current over a wide
range of input and output voltages. The output voltage
range is from 0.8V (min) to 4.5V (max). The regulator
operates in three different modes, automatically select-
ing the most efficient mode of operation. During heavy
load conditions, the TC1303/TC1304 buck converter
operates at a high, fixed frequency (2.0 MHz) using
current mode control. This minimizes output ripple and
noise (less than 8 mV peak-to-peak ripple) while main-
taining high efficiency (typically > 90%). For standby or
light load applications, the buck regulator will automat-
ically switch to a power-saving Pulse Frequency
Modulation (PFM) mode. This minimizes the quiescent
current draw on the battery, while keeping the buck
output voltage in regulation. The typical buck PFM
mode current is 38 µA. The buck regulator is capable of
operating at 100% duty cycle, minimizing the voltage
drop from input-to-output for wide input, battery-
powered applications. For fixed-output voltage applica-
tions, the feedback divider and control loop compensa-
tion components are integrated, eliminating the need
for external components. The buck regulator output is
protected against overcurrent, short circuit and over-
temperature. While shut down, the synchronous buck
N-channel and P-channel switches are off, so the LX
pin is in a high-impedance state (this allows for
connecting a source on the output of the buck regulator
as long as its voltage does not exceed the input
voltage).
4.2.1 FIXED-FREQUENCY PWM MODE
While operating in Pulse Width Modulation (PWM)
mode, the TC1303/TC1304 buck regulator switches at
a fixed, 2.0 MHz frequency. The PWM mode is suited
for higher load current operation, maintaining low out-
put noise and high conversion efficiency. PFM-to-PWM
mode transition is initiated for any of the following
conditions:
• Continuous inductor current is sensed
• Inductor peak current exceeds 100 mA
• The buck regulator output voltage has dropped
out of regulation (step load has occurred)
The typical PFM-to-PWM threshold is 80 mA.
4.2.2 PFM MODE
PFM mode is entered when the output load on the buck
regulator is very light. Once detected, the converter
enters the PFM mode automatically and begins to skip
pulses to minimize unnecessary quiescent current
draw by reducing the number of switching cycles per
second. The typical quiescent current for the switching
regulator is less than 35 µA. The transition from PWM
to PFM mode occurs when discontinuous inductor
current is sensed or the peak inductor current is less
than 60 mA (typ.). The typical PWM to PFM mode
threshold is 30 mA. For low input-to-output differential
voltages, the PWM-to-PFM mode threshold can be low
due to the lack of ripple current. It is recommended that
VIN1 be one volt greater than VOUT1 for PWM-to-PFM
transitions.
4.3 Low Drop Out Regulator (LDO)
The LDO output is a 300 mA low-dropout linear regula-
tor that provides a regulated output voltage with a
single 1 µF external capacitor. The output voltage is
available in fixed options only, ranging from 1.5V to
3.3V. The LDO is stable using ceramic output capaci-
tors that inherently provide lower output noise and
reduce the size and cost of the regulator solution. The
quiescent current consumed by the LDO output is
typically less than 40 µA, with a typical dropout voltage
of 137 mV at 200 mA. While operating in Dropout
mode, the LDO quiescent current will increase, mini-
mizing the necessary voltage differential needed for the
LDO output to maintain regulation. The LDO output is
protected against overcurrent and overtemperature
conditions.
DS21949B-page 20
© 2005 Microchip Technology Inc.