PIC24F04KA201_11 Datasheet, PDF (2/8 Pages) Microchip Technology – Silicon Errata and Data Sheet Clarification

PIC24F04KA201 FAMILY
TABLE 2: SILICON ISSUE SUMMARY
Module
Feature
Item
Number
Issue Summary
Resets
BOR
1.
Inadvertent Reset when disabling/enabling BOR.
Core
Deep Sleep
2.
Failure to avoid Deep Sleep entry.
Comparator
—
3.
Change in maximum VIOFF.
SPI
Enhanced
4.
Errors when polling SPITBF flag.
Buffer mode
Core
Low-Voltage
BOR
5.
LPBOR configuration results in ambiguous Resets.
Comparator I/O Pins
6.
Enabling comparators disables some digital I/O ports.
Comparator
—
7.
Output polarity inversion also inverts edge-detect sensing.
Core
Doze mode
8.
Instruction execution glitches following DOZE bit changes.
Note 1: Only those issues indicated in the last column apply to the current silicon revision.
Affected
Revisions⁽¹⁾
A1
X
X
X
X
X
X
X
X
DS80474B-page 2
 2011 Microchip Technology Inc.