TC1301A Datasheet, PDF (19/28 Pages) Microchip Technology – Dual LDO with Microcontroller RESET Function

7.0 TYPICAL LAYOUT TC1301A
TC1301A/B
FIGURE 7-1:
MSOP8 Silk Screen Layer.
When doing the physical layout for the TC1301A/B, the
highest priority is placing the input and output
capacitors as close to the device pins as is practical.
Figure 7-1 above represents a typical placement of the
components when using SMT0805 capacitors.
FIGURE 7-2:
MSOP8 Wiring Layer.
A wiring example for the TC1301A is shown. The vias
represent the connection to a ground plane that is
below the wiring layer.
FIGURE 7-4:
Example.
DFN3X3 Top Metal Layer
Vias represent the connection to a ground plane that is
below the wiring layer.
8.0 ADDITIONAL OUTPUT
VOLTAGE AND THRESHOLD
VOLTAGE OPTIONS
8.1 Output Voltage and Threshold
Voltage Range
Table 8-1 describes the range of output voltage options
available for the TC1301A/B. V_OUT1 and V_OUT2 can be
factory preset from 1.5V to 3.3V in 100 mV increments.
The V_DET (TC1301A) or threshold voltage (TC1301B)
can be preset from 2.2V to 3.2V in 10 mV increments.
TABLE 8-1:
CUSTOM OUTPUT VOLTAGE
AND THRESHOLD VOLTAGE
RANGES
V_OUT1
1.5V to 3.3V
V_OUT2
V_DET Threshold
1.5V to 3.3V 2.2V to 3.2V
For a listing of TC1301A/B standard parts, refer to the
Product Identification System on page 23.
FIGURE 7-3:
Example.
DFN3X3 Silk-Screen
8-lead 3X3 DFN physical layout example with bypass
capacitor.
© 2005 Microchip Technology Inc.
DS21798B-page 19