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MCP6566_13 Datasheet, PDF (19/48 Pages) Microchip Technology – 1.8V Low-Power Open-Drain Output Comparator | |||
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4.3.2 INVERTING CIRCUIT
Figure 4-6 shows an inverting circuit for single-supply
using three resistors. The resulting hysteresis diagram
is shown in Figure 4-7.
VDD
VPU
VIN
VDD
MCP656X
RPU
VOUT
R2
R3
RF
FIGURE 4-6:
Hysteresis.
Inverting Circuit with
VDD
VOH
VOUT
Low-to-High
High-to-Low
VOL
VSS
VSS
VTLH VTHL
VIN
VDD
FIGURE 4-7:
Hysteresis Diagram for the
Inverting Circuit.
In order to determine the trip voltages (VTHL and VTLH)
for the circuit shown in Figure 4-6, R2 and R3 can be
simplified to the Thevenin equivalent circuit with
respect to VDD, as shown in Figure 4-8.
V23
R23
FIGURE 4-8:
VDD
VPU
-
MCP656X
+
VSS
RPU
VOUT
RF
Thevenin Equivalent Circuit.
MCP6566/6R/6U/7/9
Where:
R23
=
----R----2---R---3----
R2 + R3
V23
=
-------R----3-------
R2 + R3
ï´
VDD
Using this simplified circuit, the trip voltage can be
calculated using the following equation:
EQUATION 4-2:
VTHL
=
VO
ï¦
Hï¨ï§
R----2---3-R---+-2--3--R----F--ï¸ï·ï¶
+ V23ï¨ï¦-R---2---3-R---+-F----R----F-ï¸ï¶
VTLH
=
VO
ï¦
Lï¨ï§
R----2---3-R---+-2--3--R----F--ï¸ï·ï¶
+ V23ï¨ï¦R----2---3-R---+-F----R----F-ï¸ï¶
Where:
VTLH = trip voltage from low-to-high
VTHL = trip voltage from high-to-low
Figure 2-21 and Figure 2-24 can be used to determine
typical values for VOH and VOL.
4.4 Bypass Capacitors
With this family of comparators, the power supply pin
(VDD for single supply) should have a local bypass
capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm for good
edge rate performance.
4.5 Capacitive Loads
Reasonable capacitive loads (e.g., logic gates) have
little impact on propagation delay (see Figure 2-32).
The supply current increases with increasing toggle
frequency (Figure 2-20), especially with higher
capacitive loads. The output slew rate and propagation
delay performance will be reduced with higher
capacitive loads.
ï£ 2009-2013 Microchip Technology Inc.
DS22143D-page 19
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