MIC4607 Datasheet, PDF (18/42 Pages) Microchip Technology – 85V, Three-Phase MOSFET Driver with Adaptive Dead-Time, Anti-Shoot-Through and Overcurrent Protection

MIC4607
4.3 PWM Input Mode (MIC4607-2)
A low going xPWM signal applied to the MIC4607-2
causes xHO to go low, typically 35ns (t_HOOFF) after the
xPWM input goes low, at which point the switch node,
xHS, falls (1 – 2).
When xHS reaches 2.2V (V_SWTH), the external
high-side MOSFET is deemed off and xLO goes high,
typically within 35 ns (t_LOON) (3-4). xHS falling below
2.2V sets a latch that can only be reset by xPWM going
high. This design prevents ringing on xHS from causing
an indeterminate xLO state. Should xHS never trip the
aforementioned internal comparator reference (2.2V),
a falling xPWM edge delayed by 250 ns will set “HS
latch” allowing xLO to go high.
A 35 ns delay gated by xPWM going low can determine
the time to xLO going high for fast falling HS designs.
xPWM going high forces xLO low in typically 35ns
(t_LOOFF) (5 – 6).
When xLO reaches 1.9V (V_LOOFF), the low-side MOS-
FET is deemed off and xHO is allowed to go high. The
delay between these two points is typically 35 ns
(t_HOON) (7 – 8).
xHO and xLO output rise and fall times (t_R/t_F) are typi-
cally 20 ns driving 1000 pF capacitive loads.
xHO
t_F
2
xLO
t_R
4
xHS
0V
t_LOON
3 _(VSWTH)
t_R
t_HOON
6
7 ^(VLOOFF)
t_F
t_LOOFF
1
5
xPWM
FIGURE 4-3:
t_HOOFF
PWM Mode (MIC4607-2).
DS20005610A-page 18
 2016 Microchip Technology Inc.