MCP6561_13 Datasheet, PDF (18/46 Pages) Microchip Technology – 1.8V Low-Power Push-Pull Output Comparator

MCP6561/1R/1U/2/4
4.6 PCB Surface Leakage
In applications where low input bias current is critical,
PCB (Printed Circuit Board) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 10¹²ï—. A 5V difference would
cause 5 pA of current to flow. This is greater than the
MCP6561/1R/1U/2/4 family’s bias current at +25°C
(1 pA, typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-9.
IN-
IN+
V_SS
Guard Ring
FIGURE 4-9:
Example Guard Ring Layout
for Inverting Circuit.
1. Inverting Configuration (Figures 4-6 and 4-9):
a) Connect the guard ring to the non-inverting
input pin (V_IN+). This biases the guard ring
to the same reference voltage as the
comparator (e.g., V_DD/2 or ground).
b) Connect the inverting pin (V_IN-) to the input
pad without touching the guard ring.
2. Non-inverting Configuration (Figure 4-4):
a) Connect the non-inverting pin (V_IN+) to the
input pad without touching the guard ring.
b) Connect the guard ring to the inverting input
pin (V_IN-).
4.7 PCB Layout Technique
When designing the PCB layout, it is critical to note that
analog and digital signal traces are adequately
separated to prevent signal coupling. If the comparator
output trace is at close proximity to the input traces,
then large output voltage changes from V_SS to V_DD, or
visa versa, may couple to the inputs and cause the
device output to oscillate. To prevent such oscillation,
the output traces must be routed away from the input
pins. The SC70-5 and SOT-23-5 are relatively immune
because the output pin OUT (pin 1) is separated by the
power pin V_DD/V_SS (pin 2) from the input pin +IN (as
long as the analog and digital traces remain separated
throughout the PCB). However, the pinouts for the dual
and quad packages (SOIC, MSOP, TSSOP) have OUT
and -IN pins (pin 1 and 2) close to each other. The
recommended layout for these packages is shown in
Figure 4-10.
OUTA
-INA
+INA
V_SS
V_DD
OUTB
-INB
+INB
FIGURE 4-10:
Recommended Layout.
4.8 Unused Comparators
An unused amplifier in a quad package (MCP6564)
should be configured as shown in Figure 4-11. This
circuit prevents the output from toggling and causing
crosstalk. It uses the minimum number of components
and draws minimal current (see Figure 2-15 and
Figure 2-18).
¼ MCP6564
V_DD
–
+
DS22139C-page 18
FIGURE 4-11:
Unused Comparators.
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