MCP6546_12 Datasheet, PDF (17/44 Pages) Microchip Technology – Open-Drain Output Sub-Microamp Comparators

MCP6546/6R/6U/7/8/9
EQUATION 4-1:
R₂₃
=
----R----²--R----³----
R₂ + R₃
V₂₃
=
-------R----³-------
R₂ + R₃
×
V_DD
Using this simplified circuit, the trip voltage can be
calculated using the following equation:
EQUATION 4-2:
V_THL
=
V_P
U
⎛
⎜
⎝
-R---₂---₃----+-----R-R---F-²--³--+------R----_P---_U--_{⎠⎟⎞}
+
V₂₃
⎛
⎝
R----₂^---₃^{-R---+-F----R-+---}_F^{--R--+--P---U-R----}_P^---_U^{--⎠⎞}
V_TLH
=
V_OL
⎛
⎜
⎝
R----₂^---₃^{-R---+-2--3--R----F--}_{⎠⎟⎞}
+
V₂₃
⎛
⎝
R----₂^---₃^{-R---+-F----R----}_F^{-⎠⎞}
V_TLH = trip voltage from low to high
V_THL = trip voltage from high to low
Figures 2-21 and 2-24 can be used to determine typi-
cal values for V_OL. This voltage is dependent on the
output current I_OL as shown in Figure 4-4. This current
can be determined using the equation below:
EQUATION 4-3:
I_OL = I_PU + I_RF
I_OL
=
⎛
⎝
V----_P----U-R----–_{P---U-V----O----L-⎠⎞}
+
⎛
⎝
V--R--_2--2-3-3---–_{-+---V--R--O--F--L-⎠⎞}
V_OH can be calculated using the equation below:
EQUATION 4-4:
V_OH
=
(V_PU
–
V₂₃
)
×
⎛
⎝
-R---₂---₃--R--+--²---³_R---+-F-----+R----^F-R----_P---_U--_⎠⎞
As explained in Section 4.1 “Comparator Inputs”, it
is important to keep the non-inverting input below
V_DD+0.3V when V_PU > V_DD.
4.5 Supply Bypass
With this family of comparators, the power supply pin
(V_DD for single supply) should have a local bypass
capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm for good
edge-rate performance.
4.6 Capacitive Loads
Reasonable capacitive loads (e.g., logic gates) have
little impact on propagation delay (see Figure 2-27).
The supply current increases with increasing toggle
frequency (Figure 2-30), especially with higher
capacitive loads.
4.7 Battery Life
In order to maximize battery life in portable
applications, use large resistors and small capacitive
loads. Avoid toggling the output more than necessary.
Do not use Chip Select (CS) too frequently, in order to
conserve power. Capacitive loads will draw additional
power at start-up.
4.8 PCB Surface Leakage
In applications where low input bias current is critical,
PCB (Printed Circuit Board) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low-humidity conditions, a typical resistance
between nearby traces is 10¹²Î©. A 5V difference
would cause 5 pA of current to flow. This is greater
than the MCP6546/6R/6U/7/8/9 family’s bias current at
25°C (1 pA, typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-7.
V_IN-
V_IN+
V_SS
Guard Ring
FIGURE 4-7:
Example Guard Ring Layout
for Inverting Circuit.
1. For the Inverting Configuration (Figures 4-4 and
4-7):
a) Connect the guard ring to the non-inverting
input pin (V_IN+). This biases the guard ring
to the same reference voltage as the
comparator (e.g., V_DD/2 or ground).
b) Connect the inverting pin (V_IN–) to the input
pad, without touching the guard ring.
© 2002-2012 Microchip Technology Inc.
DS21714G-page 17