CAP1166 Datasheet, PDF (17/79 Pages) Microchip Technology – 6 Channel Capacitive Touch Sensor with 6 LED Drivers

CAP1166
FIGURE 4-2:
SPI Timing
SPI_CLK
SPI_MSIO or
SPI_MOSI or
SPI_MISO
t_P
t_LOW
t_RISE
t_D:CLK
t_HIGH
t_FALL
t_HD:DAT
t_SU:DAT
4.5.1 SPI NORMAL MODE
The SPI Bus can operate in two modes of operation, normal and bi-directional mode. In the normal mode of operation,
there are dedicated input and output data lines. The host communicates by sending a command along the CAP1166
SPI_MOSI data line and reading data on the SPI_MISO data line. Both communications occur simultaneously which
allows for larger throughput of data transactions.
All basic transfers consist of two 8 bit transactions from the Master device while the slave device is simultaneously send-
ing data at the current address pointer value.
Data writes consist of two or more 8-bit transactions. The host sends a specific write command followed by the data to
write the address pointer. Data reads consist of one or more 8-bit transactions. The host sends the specific read data
command and continues clocking for as many data bytes as it wishes to receive.
4.5.2 SPI BI-DIRECTIONAL MODE
In the bi-directional mode of operation, the SPI data signals are combined into the SPI_MSIO line, which is shared for
data received by the device and transmitted by the device. The protocol uses a simple handshake and turn around
sequence for data communications based on the number of clocks transmitted during each phase.
All basic transfers consist of two 8 bit transactions. The first is an 8 bit command phase driven by the Master device.
The second is by an 8 bit data phase driven by the Master for writes, and by the CAP1166 for read operations.
The auto increment feature of the address pointer allows for successive reads or writes. The address pointer will return
to 00h after reaching FFh.
4.5.3 SPI_CS# PIN
The SPI Bus is a single master, multiple slave serial bus. Each slave has a dedicated CS pin (chip select) that the master
asserts low to identify that the slave is being addressed. There are no formal addressing options.
4.5.4 ADDRESS POINTER
All data writes and reads are accessed from the current address pointer. In both Bi-directional mode and Full Duplex
mode, the Address pointer is automatically incremented following every read command or every write command.
The address pointer will return to 00h after reaching FFh.
4.5.5 SPI TIMEOUT
The CAP1166 does not detect any timeout conditions on the SPI bus.
 2015 Microchip Technology Inc.
DS00001621B-page 17