DSPIC30F6010A-30IPF Datasheet, PDF (164/236 Pages) Microchip Technology – High-Performance, 16-bit Digital Signal Controllers

TABLE 21-7: SYSTEM INTEGRATION REGISTER MAP FOR dsPIC30F6010A DEVICES⁽¹⁾
SFR
Name
Addr. Bit 15
Bit 14
Bit 13 Bit 12 Bit 11 Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Reset State
RCON 0740 TRAPR IOPUWR BGST —
—
—
—
— EXTR SWR SWDTEN WDTO SLEEP IDLE
BOR
POR Depends on type of Reset.
OSCCON 0742 —
OSCTUN ^{0744 —}
COSC<2:0>
—
NOSC<2:0>
POST<1:0>
LOCK
—
—
—
—
—
—
—
—
—
—
CF
—
TUN<5:0>
LPOSCEN OSWEN Depends on Configuration bits.
0000 0000 0000 0000
PMD1 0770 T5MD T4MD T3MD T2MD T1MD QEIMD PWMMD — I2CMD U2MD U1MD SPI2MD SPI1MD C2MD C1MD ADCMD 0000 0000 0000 0000
PMD2 0772 IC8MD IC7MD IC6MD IC5MD IC4MD IC3MD IC2MD IC1MD OC8MD OC7MD
Legend: — = unimplemented bit, read as ‘0’
Note 1: Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
OC6MD
OC5MD OC4MD OC3MD
OC2MD
OC1MD
0000 0000 0000 0000
TABLE 21-8: SYSTEM INTEGRATION REGISTER MAP FOR dsPIC30F6015 DEVICES⁽¹⁾
SFR
Name
Addr. Bit 15
Bit 14
Bit 13 Bit 12 Bit 11 Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4 Bit 3 Bit 2
Bit 1
Bit 0
Reset State
RCON 0740 TRAPR IOPUWR BGST —
—
—
—
— EXTR SWR SWDTEN WDTO SLEEP IDLE
BOR
POR Depends on type of Reset.
OSCCON 0742 —
OSCTUN ^{0744 —}
COSC<2:0>
—
NOSC<2:0>
POST<1:0>
LOCK
—
—
—
—
—
—
—
—
—
—
CF
—
TUN<5:0>
LPOSCEN OSWEN Depends on Configuration bits.
0000 0000 0000 0000
PMD1 0770 T5MD T4MD T3MD T2MD T1MD QEIMD PWMMD — I2CMD U2MD U1MD SPI2MD SPI1MD —
C1MD ADCMD 0000 0000 0000 0000
PMD2 0772 IC8MD IC7MD IC6MD IC5MD IC4MD IC3MD IC2MD IC1MD OC8MD OC7MD OC6MD OC5MD OC4MD OC3MD OC2MD OC1MD 0000 0000 0000 0000
Legend: — = unimplemented bit, read as ‘0’
Note 1: Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
TABLE 21-9: DEVICE CONFIGURATION REGISTER MAP⁽¹⁾
Address
Name
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11
Bit 10
Bit 9
Bit 8
0xF80000
0xF80002
0xF80004
0xF80006
0xF80008
0xF8000A
0xF8000C
Legend:
Note 1:
FOSC
FCKSM<1:0>
—
—
—
FOS<2:0>
FWDT
FWDTEN —
—
—
—
—
—
—
FBORPOR MCLREN —
—
—
—
PWMPIN HPOL
LPOL
FBS
—
—
RBS<1:0>
—
—
—
EBS
FSS
—
—
RSS<1:0>
—
—
ESS<1:0>
FGS
—
—
—
—
—
—
—
—
FICD
BKBUG COE
—
—
—
—
—
—
— = unimplemented bit, read as ‘0’
Refer to the “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.
Bit 7
—
—
BOREN
—
—
—
—
Bit 6
—
—
—
—
—
—
—
Bit 5
Bit 4
—
FWPSA<1:0>
BORV<1:0>
—
—
—
—
—
—
—
—
Bit 3
—
—
—
Bit 2
Bit 1
Bit 0
FPR<4:0>
FWPSB<3:0>
—
FPWRT<1:0>
BSS<2:0>
BWRP
SSS<2:0>
SWRP
GSS<1:0>
GWRP
—
ICS<1:0>