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TCM829ECT713 Datasheet, PDF (15/26 Pages) Microchip Technology – Switched Capacitor Voltage Converters
5.0.7 PARALLELING DEVICES
To reduce the value of ROUT, multiple TCM828/
TCM829 devices can be connected in parallel
(Figure 5-5). The output resistance will be reduced by
a factor of N, where N is the number of TCM828/
TCM829 device. Each device will require it’s own pump
capacitor (C1), but all devices may share one reservoir
capacitor (C2). However, to preserve ripple
performance, the value of C2 should be scaled
according to the number of paralleled TCM828/
TCM829 devices.
ROUT
=
VOUT OF SINGLE DEVICE
NUMBER OF DEVICES
V+IN . . .
2
3
TCM828/
2
3 TCM828/
C1
4 TCM829 C1
4 TCM829
5 "1" 1
5 "n" 1 VOUT
...
VOUT = V-IN C2
FIGURE 5-5:
Paralleling TCM828 or
TCM829 Devices to Reduce Output Resistance.
5.0.8 VOLTAGE DOUBLER/INVERTER
Another common application of the TCM828/TCM829
devices is shown in Figure 5-6. This circuit performs
two functions in combination. C1 and C2 form the
standard inverter circuit described above. C3 and C4,
plus the two diodes, form the voltage doubler circuit. C1
and C3 are the pump capacitors, while C2 and C4 are
the reservoir capacitors. Because both sub-circuits rely
on the same switches, if either output is loaded, both
will drop toward GND. Make sure that the total current
drawn from both the outputs does not total more than
40 mA.
TCM828/TCM829
V+IN
D1, D2 = 1N4148
3
2
C1
4 TCM828/
TCM829
D1
5
1
VOUT = V-IN
C2
D2
VOUT = (2VIN) -
C3
(VFD1) - (VFD2)
C4
FIGURE 5-6:
Inverter.
Combined Doubler and
5.0.9
DIODE PROTECTION FOR HEAVY
LOADS
When heavy loads require the OUT pin to sink large
currents, being delivered by a positive source, diode
protection may be needed. The OUT pin should not be
allowed to be pulled above ground. This is
accomplished by connecting a Schottky diode
(1N5817) as shown in Figure 5-7.
4
GND
TCM828/
TCM829
OUT 1
FIGURE 5-7:
High V– Load Current.
5.0.10 LAYOUT CONSIDERATIONS
As with any switching power supply circuit, good layout
practice is recommended. Mount components as close
together as possible, to minimize stray inductance and
capacitance. Also use a large ground plane to minimize
noise leakage into other circuitry.
© 2010 Microchip Technology Inc.
DS21488B-page 15