MRF24WB0MA_13 Datasheet, PDF (15/38 Pages) Microchip Technology – MRF24WB0MA/MRF24WB0MB Data Sheet 2.4 GHz IEEE 802.11b™

MRF24WB0MA/MRF24WB0MB
2.4 JTAG Interface
Joint Test Action Group (JTAG) is the common name
used for IEEE 1149.1 entitled Standard Test Access
Port and Boundary-Scan Architecture for test access
ports that are used for testing printed circuit boards
using boundary scan. The MRF24WB0MA/
MRF24WB0MB supports JTAG boundary scan. The
JTAG port provides the optional hardware JTAG Reset
input, JTAGRST. JTAG_EN and JTAGRST need to be
driven high to enable JTAG mode. JTAG should not be
enabled during normal functional operation which
affects power state current.
2.5 Debug Serial Interface
The MRF24WB0MA/MRF24WB0MB incorporates a
Transmit Data pin (DEBUGTX) and a Receive Data pin
(DEBUGRX) for serial debugging purposes. These pins
can be connected to commercially available RS-232 line
drivers/receivers with appropriate external level shifters.
The serial interface operates at 19200, 8, N, 1, N.
2.6 SPI Interface
The slave Serial Peripheral Interface (SPI) is used to
interface with the host PIC microcontroller. The slave
SPI interface works with the Interrupt line (INT). When
data is available for the PIC microcontroller during
operation, the INT line is asserted (logic low) by the
MRF24WB0MA/MRF24WB0MB module. The INT line
is de-asserted (logic high) by the MRF24WB0MA/
MRF24WB0MB after the data is transferred to the host
PIC microcontroller. The SPI SCK frequency can be up
to 25 MHz.
The slave SPI interface implements the [CPOL = 0;
CPHA = 0] and [CPOL = 1; CPHA = 1] modes (0 and 3)
of operation. That is, data is clocked in on the first rising
edge of the clock after Chip Select (CS) is asserted.
Data is placed on the bus with most significant bit (MSb)
first.
The CS pin must be toggled with transfer blocks and
cannot be held low permanently. The falling edge of CS
is used to indicate the start of a transfer. The rising
edge of CS is used to indicate the completion of a
transfer.
Figure 4-1 in Section 4.0, Electrical Characteristics
shows the SPI timing diagram. Table 4-7 details the
SPI timing AC characteristics.
2.7 PCB Antenna
For MRF24WB0MA, the PCB antenna is fabricated on
the top copper layer and covered in solder mask. The
layers below the antenna have no copper trace.
It is recommended that the module be mounted on the
edge of the host PCB. It is permitted for PCB material
to be below the antenna structure of the module as long
as no copper traces or planes are on the host PCB in
that area. For best performance, place the module on
the host PCB according to the details shown in
Figure 1-4.
Figure 2-4, Figure 2-5 and Figure 2-6 show the
antenna and simulated radiation patterns expected
from the PCB antenna. Refer to three separate axis of
measurement that corresponds to the orientation of the
module (drawn in the center of each plot).
The horizontal and vertical data, blue and red, in each
plot correspond to the orientation (polarization) of the
measurement antenna rotated 360 degrees around the
module.
The horizontal measurement was done with the receive
antenna parallel to the module PCB. The vertical mea-
surement was done perpendicular to the module PCB.
These patterns allow the designer to understand the
performance of the module with respect to the position
of the receive or transmit antenna at the other end of
the link.
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DS70632C-page 15