MCP19110 Datasheet, PDF (144/226 Pages) Microchip Technology – Digitally Enhanced Power Analog Controller with Integrated Synchronous Driver

MCP19110/11
FIGURE 26-1:
PWMPHL
SIMPLIFIED PWM BLOCK DIAGRAM
PWMRL
8
PWMPHH
(SLAVE)
8
8
PWMRH
(SLAVE)
8
LATCH DATA
LATCH DATA
Comparator
Comparator
8
8
R Q ^OSC
SQ
SYSTEM
CLOCK
TMR2
(Note 1)
8
Comparator
RESET TIMER
8
PR2
CLKPIN_IN
Note 1: TIMER 2 should be clocked by F_OSC (8 MHz).
A PWM output (Figure 26-2) has a time base (period)
and a time that the output stays high (duty cycle). The
frequency of the PWM is the inverse of the period
(1/period).
26.1.3 PWM PERIOD
The PWM period is specified by writing to the PR2
register. The PWM period can be calculated using the
following equation:
FIGURE 26-2:
PWM OUTPUT
Period
EQUATION 26-3:
PWM PERIOD=[(PR2)+1] x T_OSC x (T2 PRESCALE VALUE)
Duty Cycle
TMR2 = PR2 + 1
TMR2 = PWMRH
TMR2 = PR2 + 1
When TMR2 is equal to PR2, the following two events
occur on the next increment cycle:
• TMR2 is cleared
• The PWM duty cycle is latched from PWMRL into
PWMRH
DS20002331B-page 144
 2013 Microchip Technology Inc.