DSPIC33FJXXXGPX06 Datasheet, PDF (137/324 Pages) Microchip Technology – High-Performance, 16-Bit Digital Signal Controllers

dsPIC33FJXXXGPX06/X08/X10
8.0 OSCILLATOR
CONFIGURATION
Note:
This data sheet summarizes the features
of this group of dsPIC33FJXXXGPX06/
X08/X10 devices. It is not intended to be a
comprehensive reference source. To com-
plement the information in this data sheet,
refer to the “dsPIC33F Family Reference
Manual”. Please refer to the Microchip
web site (www.microchip.com) for the lat-
est dsPIC33F Family Reference Manual
sections.
The dsPIC33FJXXXGPX06/X08/X10 oscillator system
provides:
• Various external and internal oscillator options as
clock sources
• An on-chip PLL to scale the internal operating
frequency to the required system clock frequency
• The internal FRC oscillator can also be used with
the PLL, thereby allowing full-speed operation
without any external clock generation hardware
• Clock switching between various clock sources
• Programmable clock postscaler for system power
savings
• A Fail-Safe Clock Monitor (FSCM) that detects
clock failure and takes fail-safe measures
• A Clock Control register (OSCCON)
• Nonvolatile Configuration bits for main oscillator
selection.
A simplified diagram of the oscillator system is shown
in Figure 8-1.
FIGURE 8-1:
dsPIC33FJXXXGPX06/X08/X10 OSCILLATOR SYSTEM DIAGRAM
OSC2
OSC1
Primary Oscillator
S3
S1
dsPIC33F
XT, HS, EC
S2
DOZE<2:0>
XTPLL, HSPLL,
PLL⁽¹⁾
ECPLL, FRCPLL
S1/S3
FCY
FRC
Oscillator
TUN<5:0>
FRCDIV<2:0>
÷ 16
SOSCO
SOSCI
LPRC
Oscillator
Secondary Oscillator
LPOSCEN
Note 1: See Figure 8-2 for PLL details
© 2007 Microchip Technology Inc.
÷2
FRCDIVN _S7
FOSC
FRCDIV16 _S6
FRC _S0
LPRC
S5
SOSC
S4
Clock Fail Clock Switch Reset
S7
NOSC<2:0> FNOSC<2:0>
WDT, PWRT,
FSCM
Timer 1
DS70286A-page 135