HCS360 Datasheet, PDF (13/24 Pages) Microchip Technology – KEELOQ CODE HOPPING ENCODER

HCS360
6.0 PROGRAMMING THE HCS360
When using the HCS360 in a system, the user will have
to program some parameters into the device including
the serial number and the secret key before it can be
used. The programming allows the user to input all
192 bits in a serial data stream, which are then stored
internally in EEPROM. Programming will be initiated by
forcing the PWM line high, after the S3 line has been
held high for the appropriate length of time. S0 and S1
should be held low during the entire program cycle
(Table 6-1 and Figure 6-1). The device can then be pro-
grammed by clocking in 16 bits at a time, followed by
the word’s complement using S3 or S2 as the clock line
and PWM as the data in line. After each 16-bit word is
loaded, a programming delay is required for the internal
program cycle to complete. The acknowledge can read
back after the programming delay (TWC). After the first
word and its complement have been downloaded, an
automatic bulk write is performed. This delay can take
up to Twc. At the end of the programming cycle, the
device can be verified (Figure 6-2) by reading back the
EEPROM. Reading is done by clocking the S3 line and
reading the data bits on PWM. For security reasons, it
is not possible to execute a verify function without first
programming the EEPROM. A verify operation can
only be done once, immediately following the pro-
gram cycle.
FIGURE 6-1: PROGRAMMING WAVEFORMS
Enter Program
Mode
S2/S3
(Clock) _T1
PWM
(Data)
T₂
TDS
TCLKH
TCLKL
TDH
Bit 0 Bit 1 Bit 2 Bit 3
Bit 14 Bit 15 Bit 0 Bit 1 Bit 2 Bit 3
Data for Word 0 (KEY_0)
Repeat 12 times for each word
TWC
Bit 14 Bit 15
Acknowledge
Bit 16 Bit 17
Data for Word 1
Note 1: Unused button inputs to be held to ground during the entire programming sequence.
2: The VDD pin must be taken to ground after a program/verify cycle.
FIGURE 6-2: VERIFY WAVEFORMS
End of
Begin Verify Cycle Here
Programming Cycle
Data in Word 0
PWM
(Data)
S2/S3
(Clock)
Bit190 Bit191
TWC
Bit 0
Bit 1 Bit 2 Bit 3
TDV
Bit 14
Bit 15
Bit 16 Bit 17
Note: If a Verify operation is to be done, then it must immediately follow the Program cycle.
TABLE 6-1 PROGRAMMING/VERIFY TIMING REQUIREMENTS
VDD = 5.0V ± 10%
25° C ± 5 °C
Parameter
Symbol
Min.
Program mode setup time
T₂
0
Hold time 1
T₁
9.0
Program cycle time
TWC
—
Clock low time
TCLKL
25
Clock high time
TCLKH
25
Data setup time
TDS
0
Data hold time
TDH
18
Data out valid time
TDV
—
Max.
4.0
—
30
—
—
—
—
24
Bit190 Bit191
Units
ms
ms
ms
µs
µs
µs
µs
µs
© 1996 Microchip Technology Inc.
Preliminary
DS40152C-page 13