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DSPIC33FJ12MC201_11 Datasheet, PDF (122/304 Pages) Microchip Technology – High-Performance, 16-bit Digital Signal Controllers
dsPIC33FJ12MC201/202
TABLE 10-1: SELECTABLE INPUT SOURCES (MAPS INPUT TO FUNCTION)(1)
Input Name
Function Name
Register
External Interrupt 1
INT1
RPINR0
External Interrupt 2
INT2
RPINR1
Timer2 External Clock
T2CK
RPINR3
Timer3 External Clock
T3CK
RPINR3
Input Capture 1
IC1
RPINR7
Input Capture 2
IC2
RPINR7
Input Capture 7
IC7
RPINR10
Input Capture 8
IC8
RPINR10
Output Compare Fault A
OCFA
RPINR11
PWM1 Fault
FLTA1
RPINR12
PWM2 Fault
FLTA2
RPINR13
QEI1 Phase A
QEA
RPINR14
QEI1 Phase B
QEB
RPINR14
QEI1 Index
INDX
RPINR15
UART1 Receive
U1RX
RPINR18
UART1 Clear To Send
U1CTS
RPINR18
SPI1 Data Input
SDI1
RPINR20
SPI1 Clock Input
SCK1
RPINR20
SPI1 Slave Select Input
SS1
RPINR21
Note 1: Unless otherwise noted, all inputs use the Schmitt input buffers.
Configuration
Bits
INT1R<4:0>
INT2R<4:0>
T2CKR<4:0>
T3CKR<4:0>
IC1R<4:0>
IC2R<4:0>
IC7R<4:0>
IC8R<4:0>
OCFAR<4:0>
FLTA1R<4:0>
FLTA2R<4:0>
QEA1R<4:0>
QEB1R<4:0>
INDX1R<4:0>
U1RXR<4:0>
U1CTSR<4:0>
SDI1R<4:0>
SCK1R<4:0>
SS1R<4:0>
10.4.2.2 Output Mapping
In contrast to inputs, the outputs of the peripheral pin
select options are mapped on the basis of the pin. In
this case, a control register associated with a particular
pin dictates the peripheral output to be mapped. The
RPORx registers are used to control output mapping.
Like the RPINRx registers, each register contains sets
of 5-bit fields, with each set associated with one RPn
pin (see Register 10-14 through Register 10-21). The
value of the bit field corresponds to one of the periph-
erals, and that peripheral’s output is mapped to the pin
(see Table 10-2 and Figure 10-3).
The list of peripherals for output mapping also includes
a null value of ‘00000’ because of the mapping
technique. This permits any given pin to remain
unconnected from the output of any of the pin
selectable peripherals.
FIGURE 10-3:
MULTIPLEXING OF
REMAPPABLE OUTPUT
FOR RPn
RPnR<4:0>
default
0
U1TX Output enable
3
U1RTS Output enable 4
Output enable
OC2 Output enable 19
UPDN Output enable 26
default
0
U1TX Output
3
U1RTS Output 4
RPn
Output Data
OC2 Output 19
UPDN Output 26
DS70265E-page 122
© 2007-2011 Microchip Technology Inc.