English
Language : 

DSPIC30F6013A-30I Datasheet, PDF (122/238 Pages) Microchip Technology – High-Performance, 16-Bit Digital Signal Controllers
TABLE 17-2: CAN2 REGISTER MAP
SFR Name
Addr
.
Bit 15
Bit 14
Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8
Bit 7
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset State
C2RXF0SID 03C0
—
—
— Receive Acceptance Filter 0 Standard Identifier <10:0>
— EXIDE
C2RXF0EIDH 03C2
—
—
—
—
Receive Acceptance Filter 0 Extended Identifier <17:6>
C2RXF0EIDL 03C4
Receive Acceptance Filter 0 Extended Identifier <5:0>
—
—
—
—
—
—
—
—
—
—
C2RXF1SID 03C8
—
—
—
Receive Acceptance Filter 1 Standard Identifier <10:0>
— EXIDE
C2RXF1EIDH 03CA
—
—
—
—
Receive Acceptance Filter 1 Extended Identifier <17:6>
C2RXF1EIDL 03CC
Receive Acceptance Filter 1 Extended Identifier <5:0>
—
—
—
—
—
—
—
—
—
—
C2RXF2SID 03D0
—
—
—
Receive Acceptance Filter 2 Standard Identifier <10:0>
— EXIDE
C2RXF2EIDH 03D2
—
—
—
—
Receive Acceptance Filter 2 Extended Identifier <17:6>
C2RXF2EIDL 03D4
Receive Acceptance Filter 2 Extended Identifier <5:0>
—
—
—
—
—
—
—
—
—
—
C2RXF3SID 03D8
—
—
—
Receive Acceptance Filter 3 Standard Identifier <10:0>
— EXIDE
C2RXF3EIDH 03DA
—
—
—
—
Receive Acceptance Filter 3 Extended Identifier <17:6>
C2RXF3EIDL 03DC
Receive Acceptance Filter 3 Extended Identifier <5:0>
—
—
—
—
—
—
—
—
—
—
C2RXF4SID 03E0
—
—
—
Receive Acceptance Filter 4 Standard Identifier <10:0>
— EXIDE
C2RXF4EIDH 03E2
—
—
—
—
Receive Acceptance Filter 4 Extended Identifier <17:6>
C2RXF4EIDL 03E4
Receive Acceptance Filter 4 Extended Identifier <5:0>
—
—
—
—
—
—
—
—
—
—
C2RXF5SID 03E8
—
—
—
Receive Acceptance Filter 5 Standard Identifier <10:0>
— EXIDE
C2RXF5EIDH 03EA
—
—
—
—
Receive Acceptance Filter 5 Extended Identifier <17:6>
C2RXF5EIDL 03EC
Receive Acceptance Filter 5 Extended Identifier <5:0>
—
—
—
—
—
—
—
—
—
—
C2RXM0SID 03F0
—
—
—
Receive Acceptance Mask 0 Standard Identifier <10:0>
— MIDE
C2RXM0EIDH 03F2
—
—
—
—
Receive Acceptance Mask 0 Extended Identifier <17:6>
C2RXM0EIDL 03F4
Receive Acceptance Mask 0 Extended Identifier <5:0>
—
—
—
—
—
—
—
—
—
—
C2RXM1SID 03F8
—
—
—
Receive Acceptance Mask 1 Standard Identifier <10:0>
— MIDE
C2RXM1EIDH 03FA
—
—
—
—
Receive Acceptance Mask 1 Extended Identifier <17:6>
C2RXM1EIDL 03FC
Receive Acceptance Mask 1 Extended Identifier <5:0>
—
—
—
—
—
—
—
—
—
—
C2TX2SID 0400
Transmit Buffer 2 Standard Identifier <10:6>
—
—
—
Transmit Buffer 2 Standard Identifier <5:0>
SRR TXIDE
C2TX2EID 0402 Transmit Buffer 2 Extended Identifier <17:14> —
—
—
—
Transmit Buffer 2 Extended Identifier <13:6>
C2TX2DLC 0404
Transmit Buffer 2 Extended Identifier <5:0>
TXRTR TXRB1 TXRB0
DLC<3:0>
—
—
—
C2TX2B1 0406
Transmit Buffer 2 Byte 1
Transmit Buffer 2 Byte 0
C2TX2B2 0408
Transmit Buffer 2 Byte 3
Transmit Buffer 2 Byte 2
C2TX2B3 040A
Transmit Buffer 2 Byte 5
Transmit Buffer 2 Byte 4
C2TX2B4 040C
Transmit Buffer 2 Byte 7
Transmit Buffer 2 Byte 6
C2TX2CON 040E
—
—
—
—
—
—
—
—
—
TXABT TXLARB TXERR TXREQ — TXPRI<1:0>
C2TX1SID 0410
Transmit Buffer 1 Standard Identifier <10:6>
—
—
—
Transmit Buffer 1 Standard Identifier <5:0>
SRR TXIDE
C2TX1EID 0412 Transmit Buffer 1 Extended Identifier <17:14> —
—
—
—
Transmit Buffer 1 Extended Identifier <13:6>
C2TX1DLC 0414
Transmit Buffer 1 Extended Identifier <5:0>
TXRTR TXRB1 TXRB0
DLC<3:0>
—
—
—
Legend: u = uninitialized bit
000u uuuu uuuu uu0u
0000 uuuu uuuu uuuu
uuuu uu00 0000 0000
000u uuuu uuuu uu0u
0000 uuuu uuuu uuuu
uuuu uu00 0000 0000
000u uuuu uuuu uu0u
0000 uuuu uuuu uuuu
uuuu uu00 0000 0000
000u uuuu uuuu uu0u
0000 uuuu uuuu uuuu
uuuu uu00 0000 0000
000u uuuu uuuu uu0u
0000 uuuu uuuu uuuu
uuuu uu00 0000 0000
000u uuuu uuuu uu0u
0000 uuuu uuuu uuuu
uuuu uu00 0000 0000
000u uuuu uuuu uu0u
0000 uuuu uuuu uuuu
uuuu uu00 0000 0000
000u uuuu uuuu uu0u
0000 uuuu uuuu uuuu
uuuu uu00 0000 0000
uuuu u000 uuuu uuuu
uuuu 0000 uuuu uuuu
uuuu uuuu uuuu u000
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
uuuu uuuu uuuu uuuu
0000 0000 0000 0000
uuuu u000 uuuu uuuu
uuuu 0000 uuuu uuuu
uuuu uuuu uuuu u000
Note: Refer to “dsPIC30F Family Reference Manual” (DS70046) for descriptions of register bit fields.