MIC4930 Datasheet, PDF (12/24 Pages) Micrel Semiconductor – Hyper Speed Control 3A Buck Regulator

MIC4930
4.0 FUNCTIONAL DESCRIPTION
4.1 PV_IN
The power input (PV_IN) pin provides power to the
internal MOSFETs for the switch mode regulator
section of the MIC4930. The input supply operating
range is from 2.7V to 5.5V. A low-ESR ceramic
capacitor of at least 10 μF is required to bypass from
PV_IN to (power) GND. See the Application Information
section for further details.
4.2 AV_IN
The analog power input (AV_IN) pin provides power to
the internal control and analog supply circuitry. Careful
layout should be considered to ensure that
high-frequency switching noise caused by PV_IN is
reduced before reaching AV_IN. Always place a 1 μF
minimum ceramic capacitor very close to the IC
between the AV_IN and AGND pins. For additional
high-frequency switching noise attenuation, RC
filtering can be used (R = 10Ω).
4.3 EN
A logic high signal on the enable (EN) pin activates the
output of the switch. A logic low on EN deactivates the
output and reduces the supply current to a nominal
0.01 μA. Do not leave this pin floating.
4.4 SW
The switch (SW) pin connects directly to one side of the
inductor and provides the current path during switching
cycles. The other end of the inductor is connected to
the load and output capacitor. Due to the high speed
switching on this pin, the switch node should be routed
away from sensitive nodes whenever possible to avoid
unwanted injection of noise.
4.5 PGND
The power ground (PGND) pin is the ground return
terminal for the high current in the switching node SW.
The current loop for the PGND should be as short as
possible and kept separate from the AGND net
whenever applicable.
4.6 PG
The power-is-good (PG) pin is an open-drain output
that indicates logic high when the output voltage is
typically above 88% of its steady-state voltage. A
pull-up resistor of 10 kΩ or greater should be
connected from PG to V_OUT, or to another voltage
source less than or equal to the input voltage.
4.7 FB
To program the output voltage, an external resistive
divider network is connected to this pin from the output
voltage to AGND, as shown in the Typical Application
Circuit, and is compared to the internal 0.625V
reference within the regulation loop. The formula in
Equation 4-1 is used to program the output voltage.
EQUATION 4-1:
V _OUT = V _REF  _1 + -^RR----12-_
TABLE 4-1:
V_OUT
1.0V
1.2V
1.5V
1.8V
2.5V
3.3V
RECOMMENDED FEEDBACK
RESISTOR VALUES
R1
R2
120k
274k
316k
301k
316k
309k
180k
294k
226k
160k
105k
71.5k
The feed-forward capacitor (C_F in the Typical
Application Circuit) is typically in the range of 22 pF to
39 pF. The MIC4930 features an internal ripple
injection network, whose current is injected into the FB
node and integrated by C_F. Thus, the waveform at FB
is approximately a triangular ripple. The size of C_F
dictates the amount of ripple amplitude at the FB node.
Smaller values of C_F yield higher FB ripple amplitudes
and better stability, but also somewhat degrade line
regulation and transient response.
DS20005669A-page 12
 2016 Microchip Technology Inc.