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MCP3422 Datasheet, PDF (12/58 Pages) Microchip Technology – 18-Bit, Multi-Channel ΔΣ Analog-to-Digital Converter with I2C™ Interface and On-Board Reference
MCP3422/3/4
RSS CHn
VDD
D1 VT = 0.6V
Sampling
Switch
SS RS
V
CPIN
4 pF
D2
VT = 0.6V
ILEAKAGE
(~ ±1 nA)
CSAMPLE
(3.2 pF)
LEGEND
V = Signal Source
RSS = Source Impedance
CHn = Analog Input Pin
CPIN = Input Pin Capacitance
VT = Threshold Voltage
VSS
ILEAKEAGE =
SS =
RS =
CSAMPLE =
D1, D2 =
Leakage Current at Analog Pin
Sampling Switch
Sampling Switch Resistor
Sample Capacitance
ESD Protection Diode
FIGURE 3-1:
Equivalent Analog Input Circuit.
3.3 Serial Clock Pin (SCL)
SCL is the serial clock pin of the I2C interface. The
device act only as a slave and the SCL pin accepts
only external serial clocks. The input data from the
Master device is shifted into the SDA pin on the rising
edges of the SCL clock and output from the slave
device occurs at the falling edges of the SCL clock.
The SCL pin is an open-drain N-channel driver.
Therefore, it needs a pull-up resistor from the VDD line
to the SCL pin. Refer to Section 5.3 “I2C Serial Com-
munications” for more details of I2C Serial Interface
communication.
3.4 Serial Data Pin (SDA)
SDA is the serial data pin of the I2C interface. The SDA
pin is used for input and output data. In read mode, the
conversion result is read from the SDA pin (output). In
write mode, the device configuration bits are written
(input) though the SDA pin. The SDA pin is an open-
drain N-channel driver. Therefore, it needs a pull-up
resistor from the VDD line to the SDA pin. Except for
start and stop conditions, the data on the SDA pin must
be stable during the high period of the clock. The high
or low state of the SDA pin can only change when the
clock signal on the SCL pin is low. Refer to Section 5.3
“I2C Serial Communications” for more details of I2C
Serial Interface communication.
Typical range of the pull-up resistor value for SCL and
SDA is from 5 kΩ to 10 kΩ for standard (100 kHz) and
fast (400 kHz) modes, and less than 1 kΩ for high
speed mode (3.4 MHz).
3.5 Exposed Thermal Pad (EP)
There is an internal electrical connection between the
Exposed Thermal Pad (EP) and the VSS pin; they must
be connected to the same potential on the Printed
Circuit Board (PCB).
DS22088C-page 12
© 2009 Microchip Technology Inc.