TC1072-25VCH713 Datasheet, PDF (11/22 Pages) Microchip Technology – 50mA and 100mA CMOS LDOs with Shutdown, ERROR Output and VREF Bypass

TC1072/TC1073
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
Pin No.
(6-Pin SOT-23)
1
2
3
4
5
6
Symbol
V_IN
GND
SHDN
ERROR
Bypass
V_OUT
Description
Unregulated supply input.
Ground terminal.
Shutdown control input.
Out-of-Regulation Flag. (Open drain output).
Reference bypass input.
Regulated voltage output.
3.1 Input Voltage Supply (V_IN)
Connect unregulated input supply to the V_IN pin. If
there is a large distance between the input supply and
the LDO regulator, some input capacitance is
necessary for proper operation. A 1 µF capacitor
connected from V_IN to ground is recommended for
most applications.
3.2 Ground (GND)
Connect the unregulated input supply ground return to
GND. Also connect the negative side of the 1 µF typical
input decoupling capacitor close to GND and the
negative side of the output capacitor C_OUT to GND.
3.3 Shutdown Control Input (SHDN)
The regulator is fully enabled when a logic-high is
applied to SHDN. The regulator enters shutdown when
a logic-low is applied to SHDN. During shutdown,
output voltage falls to zero, ERROR is open-circuited
and supply current is reduced to 0.5 µA (maximum).
3.4 Out-Of-Regulation Flag (ERROR)
ERROR goes low when V_OUT is out-of-tolerance by
approximately – 5%.
3.5 Reference Bypass Input (Bypass)
Connecting a 470 pF to this input further reduces
output noise.
3.6 Regulated Voltage Output (V_OUT)
Connect the output load to V_OUT of the LDO. Also
connect the positive side of the LDO output capacitor
as close as possible to the V_OUT pin.
© 2007 Microchip Technology Inc.
DS21354D-page 11