MCP42050-I Datasheet, PDF (11/32 Pages) Microchip Technology – Single/Dual Digital Potentiometer with SPI Interface

2.1 Parametric Test Circuits
V+ = V_DD
A ^{1LSB = V+/256}
V+
W
B
DUT
+
-
V_MEAS*
*Assume infinite input impedance
FIGURE 2-25:
Potentiometer Divider Non-
Linearity Error Test Circuit (DNL, INL).
No Connection
A
BW
DUT
I_W
+
- ^VMEAS*
*Assume infinite input impedance
FIGURE 2-26:
Resistor Position Non-
Linearity Error Test Circuit (Rheostat operation
DNL, INL).
DUT
A
W
B
I_SW
Rsw = 0.1V
Isw
Code = 00h
+
0.1V
-
V_SS = 0 to V_DD
FIGURE 2-27:
Circuit.
Wiper Resistance Test
MCP41XXX/42XXX
V_A
V_DD A
V+
BW
DUT
+
-
V_MEAS*
V+ = V_DD ± 10%
PSRR (dB) = 20LOG (_{∆∆VVMDDEAS})
PSS (%/%) = ∆V_DD
∆V_MEAS
*Assume infinite input impedance
FIGURE 2-28:
Power Supply Sensitivity
Test Circuit (PSS, PSRR).
V_{IN ~}
OFFSET
GND
A
W
DUT
B
2.5V DC
+5V
+
-
V_OUT
FIGURE 2-29:
Circuit.
Gain vs. Frequency Test
~ ^VIN
A ^{DUT B}
+5V
2.5V DC
Offset
-
V_OUT
+ _MCP601
FIGURE 2-30:
Capacitance Test Circuit.
 2003 Microchip Technology Inc.
DS11195C-page 11