KSZ8051MNL Datasheet, PDF (11/66 Pages) Micrel Semiconductor – 10Base-T/100Base-TX Physical Layer Transceiver

KSZ8051MNL/RNL
TABLE 2-3: SIGNALS - KSZ8051RNL (CONTINUED)
Pin
Number
Pin Name
Type
Note 2-1
Description
Management Interface (MII) Data I/O
11
MDIO
Ipu/Opu This pin has a weak pull-up, is open-drain, and requires an external 1.0 kΩ
pull-up resistor.
12
MDC
Ipu
Management Interface (MII) Clock input
This clock pin is synchronous to the MDIO data pin.
The pull-up/pull-down value is latched as PHYADDR[0] at the de-assertion of
13
PHYAD0
Ipu/O reset.
See the Strap-In Options - KSZ8051RNL section for details.
The pull-up/pull-down value is latched as PHYADDR[1] at the de-assertion of
14
PHYAD1
Ipd/O reset.
See the Strap-In Options - KSZ8051RNL section for details.
RMII mode: RMII Receive Data Output[1] (Note 2-2)
15
RXD1/
PHYAD2
Ipd/O
Config mode: The pull-up/pull-down value is latched as PHYADDR[2] at the
de-assertion of reset.
See the Strap-In Options - KSZ8051RNL section for details.
RMII mode: RMII Receive Data Output[0] (Note 2-2)
16
RXD0/
DUPLEX
Ipu/O
Config mode: The pull-up/pull-down value is latched as DUPLEX at the de-
assertion of reset.
See the Strap-In Options - KSZ8051RNL section for details.
17
VDDIO
P
3.3V, 2.5V, or 1.8V digital V_DD
RMII mode: RMII Carrier Sense/Receive Data Valid output
18
CRS_DV/
CONFIG2
Ipd/O
Config mode: The pull-up/pull-down value is latched as CONFIG2 at the de-
assertion of reset.
See the Strap-In Options - KSZ8051RNL section for details.
RMII mode: 25 MHz mode: This pin provides the 50 MHz RMII reference clock
output to the MAC. See also XI (pin 9).
19
REF_CLK/
B-CAST_OFF
Ipd/O
50 MHz mode: This pin is a no connect. See also XI (pin 9).
Config mode: The pull-up/pull-down value is latched as B-CAST_OFF at the
de-assertion of reset.
See the Strap-In Options - KSZ8051RNL section for details.
RMII mode: RMII Receive Error output
20
RXER/ISO
Ipd/O
Config mode: The pull-up/pull-down value is latched as ISOLATE at the de-
assertion of reset.
See the Strap-In Options - KSZ8051RNL section for details.
Interrupt output: Programmable interrupt output
This pin has a weak pull-up, is open-drain, and requires an external 1.0 kΩ
21
INTRP/
NAND_Tree#
Ipu/Opu
pull-up resistor.
Config mode: The pull-up/pull-down value is latched as NAND Tree# at the
de-assertion of reset.
See the Strap-In Options - KSZ8051RNL section for details.
22
NC
— No connect – This pin is not bonded and can be left floating.
23
TXEN
I
RMII Transmit Enable input
24
TXD0
I
RMII Transmit Data Input[0] (Note 2-3)
25
TXD1
I
RMII Transmit Data Input[1] (Note 2-3)
26
NC
NC No connect – This pin is not bonded and can be left floating.
27
NC
NC No connect – This pin is not bonded and can be left floating.
The pull-up/pull-down value is latched as CONFIG0 at the de-assertion of
28
CONFIG0
Ipd/O reset.
See the Strap-In Options - KSZ8051RNL section for details.
 2016 Microchip Technology Inc.
DS00002310A-page 11