24AA256UID Datasheet, PDF (11/28 Pages) Microchip Technology – 256K I2C™ Serial EEPROM

24AA256UID
8.0 READ OPERATION
Read operations are initiated in much the same way as
write operations, with the exception that the R/W bit of
the control byte is set to ‘1’. There are three basic types
of read operations: current address read, random read
and sequential read.
8.1 Current Address Read
The 24AA256UID contains an address counter that
maintains the address of the last word accessed, inter-
nally incremented by ‘1’. Therefore, if the previous read
access was to address ‘n’ (n is any legal address), the
next current address read operation would access data
from address n + 1.
Upon receipt of the control byte with R/W bit set to ‘1’,
the 24AA256UID issues an acknowledge and transmits
the 8-bit data word. The master will not acknowledge
the transfer, but does generate a Stop condition and the
24AA256UID discontinues transmission (Figure 8-1).
FIGURE 8-1:
CURRENT ADDRESS
READ
Bus Activity
Master
SDA Line
Bus Activity
S
T
A
Control
R
Byte
T
S
1
0
1
0
A
2
AA
10
1
A
C
K
Data
S
T
Byte
O
P
P
N
O
A
C
K
8.2 Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, the word address must first
be set. This is done by sending the word address to the
24AA256UID as part of a write operation (R/W bit set to
‘0’). Once the word address is sent, the master gener-
ates a Start condition following the acknowledge. This
terminates the write operation, but not before the
internal Address Pointer is set. The master then issues
the control byte again, but with the R/W bit set to a one.
The 24AA256UID will then issue an acknowledge and
transmit the 8-bit data word. The master will not
acknowledge the transfer, though it does generate a
Stop condition, which causes the 24AA256UID to dis-
continue transmission (Figure 8-2). After a random
Read command, the internal address counter will point
to the address location following the one that was just
read.
8.3 Sequential Read
Sequential reads are initiated in the same way as a
random read except that after the 24AA256UID trans-
mits the first data byte, the master issues an acknowl-
edge as opposed to the Stop condition used in a
random read. This acknowledge directs the
24AA256UID to transmit the next sequentially
addressed 8-bit word (Figure 8-3). Following the final
byte transmitted to the master, the master will NOT
generate an acknowledge, but will generate a Stop
condition. To provide sequential reads, the
24AA256UID contains an internal Address Pointer
which is incremented by one at the completion of each
operation. This Address Pointer allows the entire mem-
ory contents to be serially read during one operation.
The internal Address Pointer will automatically roll over
from address 7FFF to address 0000 if the master
acknowledges the byte received from the array
address 7FFF.
FIGURE 8-2:
RANDOM READ
Bus Activity
Master
S
T
A
Control
R
Byte
T
Address
High Byte
SDA Line
S
1
0
1
0
A
2
A
1
A
0
0
x
A
Bus Activity
C
K
x = “don’t care” bit
FIGURE 8-3:
Bus Activity
Master
SEQUENTIAL READ
Control
Byte
Data (n)
SDA Line
A
A
C
C
Bus Activity
K
K
Address
Low Byte
A
C
K
Data (n + 1)
A
C
K
S
T
A
Control
R
Byte
T
S
1
0
1
0
A
2
A
1
A
0
1
A
A
C
C
K
K
Data
S
T
Byte
O
P
P
N
O
A
C
K
Data (n + 2)
A
C
K
S
Data (n + x)
T
O
P
P
N
O
A
C
K
 2013 Microchip Technology Inc.
DS20005215A-page 11