TC4467EOE Datasheet, PDF (10/22 Pages) Microchip Technology – Logic-Input CMOS Quad Drivers

TC4467/TC4468/TC4469
A resistive-load-caused dissipation for supply-
referenced loads is a function of duty cycle, load
current and output voltage. The power dissipation is
EQUATION
P_L = DV_OI_L
D = Duty Cycle
V_O
I_L
=
=
Device Output
Load Current
Voltage
Quiescent power dissipation depends on input signal
duty cycle. Logic HIGH outputs result in a lower power
dissipation mode, with only 0.6 mA total current drain
(all devices driven). Logic LOW outputs raise the
current to 4 mA maximum. The quiescent power
dissipation is:
EQUATION
P_Q = V_S(D(I_H) + (1 – D)I_L)
I_H = Quiescent Current with all outputs LOW
(4 mA max.)
I_L = Quiescent Current with all outputs HIGH
(0.6 mA max.)
D = Duty Cycle
V_S = Supply Voltage
Transition power dissipation arises in the complimen-
tary configuration (TC446X) because the output stage
N-channel and P-channel MOS transistors are ON
simultaneously for a very short period when the output
changes. The transition power dissipation is
approximately:
EQUATION
P_T = fV_s(10 × 10^–9)
C = 1000 pF Capacitive Load
V_S = 15 V
D = 50%
f = 200 kHz
P_D = Package Power Dissipation
= P_L + P_Q + P_T
= 45mW + 35mW + 30mW
= 110mW
Package power dissipation is the sum of load,
quiescent and transition power dissipations. An
example shows the relative magnitude for each term:
Maximum operating temperature is:
EQUATION
T_J – θ_JA( P_D) = 141°C
T_J = Maximum allowable junction temperature
(+150°C )
θ_JA = Junction-to-ambient thernal resistance
(83.3°C/W) 14-pin plastic package
Note:
Ambient operating temperature should not
exceed +85°C for "EJD" device or +125°C
for "MJD" device.
1 µF Film
1A
1B
1
2
2A
2B
3
4
3A ⁵
3B ⁶
4A ⁸
4B ⁹
V_DD
14
7
0.1 µF Ceramic
13
V_OUT
470 pF
12
11
10
Input: 100 kHz,
square wave,
t_RISE = t_FALL ≤ 10 nsec
+5 V
Input
(A, B)
0V
V_DD
Output
0V
10%
t_D1 ^90%
t_R
10%
90%
t_D2
90%
t_F
10%
FIGURE 4-1:
Switching Time Test Circuit.
DS21425B-page 10
 2002 Microchip Technology Inc.