TC1016_13 Datasheet, PDF (10/22 Pages) Microchip Technology – 80 mA, Tiny CMOS LDO With Shutdown

TC1016
4.1 Input Capacitor
Low input source impedance is necessary for the LDO
to operate properly. When operating from batteries, or
in applications with long lead length (> 10") between
the input source and the LDO, some input capacitance
is required. A minimum of 0.1 µF is recommended for
most applications and the capacitor should be placed
as close to the input of the LDO as is practical. Larger
input capacitors will help reduce the input impedance
and further reduce any high-frequency noise on the
input and output of the LDO.
4.2 Output Capacitor
A minimum output capacitance of 1 µF for the TC1016
is required for stability. The ESR requirements on the
output capacitor are between 0 and 2 ohms. The output
capacitor should be located as close to the LDO output
as is practical. Ceramic materials X7R and X5R have
low temperature coefficients and are well within the
acceptable ESR range required. A typical 1 µF X5R
0805 capacitor has an ESR of 50 milli-ohms. Larger
output capacitors can be used with the TC1016 to
improve dynamic behavior and input ripple rejection
performance.
Ceramic, aluminum electrolytic or tantalum capacitor
types can be used. Since many aluminum electrolytic
capacitors freeze at approximately –30°C, ceramic or
solid tantalums are recommended for applications
operating below –25°C. When operating from sources
other than batteries, supply noise rejection and tran-
sient response can be improved by increasing the
value of the input and output capacitors, and by
employing passive filtering techniques.
4.3 Turn-On Response
The turn on response is defined as two separate
response categories, Wake-up Time (t_WK) and Settling
Time (t_S).
The TC1016 has a fast t_WK (10 µsec, typ.) when
released from shutdown. Figure 4-3 provides the
TC1016’s t_WK. The t_WK is defined as the time it takes
for the output to rise to 2% of the V_OUT value after being
released from shutdown.
The total turn-on response is defined as the t_S (see
Figure 4-3). The t_S (inclusive with t_WK) is defined as the
condition when the output is within 98% of its fully
enabled value (42 µsec, typ.) when released from shut-
down. The settling time of the output voltage is
dependent on load conditions and output capacitance
on V_OUT (RC response).
Table 4-1 demonstrates the typical turn-on response
timing for different input voltage power-up frequencies:
V_OUT = 2.8V, V_IN = 5.0V, I_OUT = 60 mA and C_OUT = 1 µF.
TABLE 4-1:
Frequency
1000 Hz
500 Hz
100 Hz
50 Hz
10 Hz
TYPICAL TURN-ON
RESPONSE TIMING
Typical (t_WK)
5.3 µsec
5.9 µsec
9.8 µsec
14.5 µsec
17.2 µsec
Typical (t_S)
14 µsec
16 µsec
32 µsec
52 µsec
77 µsec
V_IL
SHDN
V_OUT
FIGURE 4-3:
Wake-Up Time from Shutdown.
V_IH
t_S
98%
2%
t_WK
DS21666B-page 10
© 2005 Microchip Technology Inc.