SST49LF016C Datasheet, PDF (1/43 Pages) Silicon Storage Technology, Inc – 16 Mbit LPC Serial Flash

Obsolete Device
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16 Mbit LPC Serial Flash
SST49LF016C
EOL Data Sheet
The SST49LF016C flash memory device is designed to interface with host con-
trollers (chipsets) that support a low pin-count (LPC) interface for system firmware
applications. Complying with LPC Interface Specification 1.1, SST49LF016C sup-
ports a Burst-Read data transfer of 15.6 MBytes per second at 33 MHz clock
speed and 31.2 MBytes per second at 66 MHz clock speed, up to 128 bytes in a
single operation
Features
• Operational Clock Frequency
– 33 MHz
– 66 MHz
• Organized as 2M x8
• Conforms to LPC Interface Specification v1.1
– Support Multi-Byte Firmware Memory Read/Write
Cycles
• Single 3.0-3.6V Read and Write Operations
• LPC Mode
– 5-signal LPC bus interface for both in-system and fac-
tory programming using programmer equipment
– Multi-Byte Read data transfer rate
15.6 MB/s @ 33 MHz PCI clock and
31.2 MB/s @ 66 MHz clock
- Firmware Memory Read cycle supporting
1, 2, 4, 16, and 128 Byte Read
- Firmware Memory Write cycle supporting
1, 2, and 4 Byte Write
– 33 MHz/66 MHz clock frequency operation
– WP#/AAI and TBL# pins provide hardware Write protect
for entire chip and/or top Boot Block
– Block Locking Registers for individual block Read-Lock,
Write-Lock, and Lock-Down protection
– 5 GPI pins for system design flexibility
– 4 ID pins for multi-chip selection
– Multi-Byte capability registers
(read-only registers)
– Status register for End-of-Write detection
– Program-/Erase-Suspend
Read or Write to other blocks during
Program-/Erase-Suspend
• Two-cycle Command Set
• Security ID Feature
– 256-bit Secure ID space
- 64-bit Unique Factory Pre-programmed Device Identi-
fier
- 192-bit User-Programmable OTP
• Superior Reliability
– Endurance: 100,000 Cycles (typical)
– Greater than 100 years Data Retention
• Low Power Consumption
– Active Read Current: 12 mA (typical)
– Standby Current: 10 µA (typical)
• Uniform 4 KByte sectors
– 35 Overlay Blocks: one 16-KByte Boot Block, two 8-
KByte Parameter Blocks, one 32-Kbyte Parameter
Block, thirty-one 64-KByte Main Blocks.
• Fast Sector-Erase/Program Operation
– Sector-Erase Time: 18 ms (typical)
– Block-Erase Time: 18 ms (typical)
– Program Time: 7 µs (typical)
• Auto Address Increment (AAI) for Rapid Factory
Programming (High Voltage Enabled)
– RY/BY# pin for End-of-Write detection
– Multi-Byte Program
– Chip Rewrite Time: 4 seconds (typical)
• Packages Available
– 32-lead PLCC
– 32-lead TSOP (8mm x 14mm)
– 40-lead TSOP (10mm x 20mm)
• All devices are RoHS compliant
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DS20005029B
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