PIC16CR83 Datasheet, PDF (1/4 Pages) Microchip Technology – PIC16CR83 Rev. A Silicon Errata Sheet

PIC16CR83
PIC16CR83 Rev. A Silicon Errata Sheet
The PIC16CR83 (Rev. A) parts you have received con-
form functionally to the Device Data Sheet (DS30081F),
except for the anomalies described below.
All the problems listed here will be addressed in future
revisions of the PIC16CR83 silicon.
1. Module: CPU (STATUS bit)
The operation of the power-down (PD) bit in the STA-
TUS register may not function correctly for tempera-
tures below - 20 ˚C.
Work Around
None
2. Module: Data EEPROM
Do not perform a modify (set or clear a bit) of the
EECON1 register one instruction cycle after an
EEPROM read. This will corrupt the EEDATA regis-
ter.
Example:
BSF EECON1, RD
BCF EECON1, WREN
Work Around
Use either of the following two code segment in place
of the above example.
BSF EECON1, RD
NOP
BCF EECON1, WREN
or
BCF EECON1, WREN
BSF EECON1, RD
3. Module: Timer0
The TMR0 register may increment when the WDT
postscaler is switched to the Timer0 prescaler. If
TMR0 = FFh, this will cause TMR0 to overflow (set-
ting T0IF).
Work Around
Follow the following sequence:
a) Read the 8-bit TMR0 register into the W register
b) Clear the TMR0 register
c) Assign WDT postscaler to Timer0
d) Write W register to TMR0
Note: As with any windowed EPROM device, please cover the window at all times, except when erasing.
© 1998 Microchip Technology Inc.
DS30081F/CR83/E1A1-page 1