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MCP6N11-005E Datasheet, PDF (1/50 Pages) Microchip Technology – 500 kHz, 800 μA Instrumentation Amplifier
MCP6N11
500 kHz, 800 µA Instrumentation Amplifier
Features
• Rail-to-Rail Input and Output
• Gain Set by 2 External Resistors
• Minimum Gain (GMIN) Options:
1, 2, 5, 10 or 100 V/V
• Common Mode Rejection Ratio (CMRR): 115 dB
(typical, GMIN = 100)
• Power Supply Rejection Ratio (PSRR): 112 dB
(typical, GMIN = 100)
• Bandwidth: 500 kHz (typical, Gain = GMIN)
• Supply Current: 800 μA/channel (typical)
• Single Channel
• Enable/VOS Calibration pin: (EN/CAL)
• Power Supply: 1.8V to 5.5V
• Extended Temperature Range: -40°C to +125°C
Typical Applications
• High Side Current Sensor
• Wheatstone Bridge Sensors
• Difference Amplifier with Level Shifting
• Power Control Loops
Design Aids
• Microchip Advanced Part Selector (MAPS)
• Demonstration Board
• Application Notes
Block Diagram
VOUT
RF
RG
VREF
VIP
VIM
VOUT RM4
I4
VFG
VDD VSS
VREF
VIP
VIM
GM2
GM1
Σ
I2
I1
I3
GM3
VTR
POR
Low Power
VOS Calibration
EN/CAL
Description
Microchip Technology Inc. offers the single MCP6N11
instrumentation amplifier (INA) with Enable/VOS Cali-
bration pin (EN/CAL) and several minimum gain
options. It is optimized for single-supply operation with
rail-to-rail input (no common mode crossover distor-
tion) and output performance.
Two external resistors set the gain, minimizing gain
error and drift-over temperature. The reference voltage
(VREF) shifts the output voltage (VOUT).
The supply voltage range (1.8V to 5.5V) is low enough
to support many portable applications. All devices are
fully specified from -40°C to +125°C.
These parts have five minimum gain options (1, 2, 5, 10
and 100 V/V). This allows the user to optimize the input
offset voltage and input noise for different applications.
Typical Application Circuit
VBAT
VDD
10 Ω
IDD
+1.8V
to
U1
+5.5V
MCP6N11
VOUT
RF
VFG 200 kΩ
RG
10 kΩ
VREF
Package Types
MCP6N11
SOIC
MCP6N11
2×3 TDFN *
VFG 1
VIM 2
VIP 3
VSS 4
8 EN/CAL VFG 1
8 EN/CAL
7 VDD
6 VOUT
5 VREF
VIM 2 EP 7 VDD
VIP 3
9
6 VOUT
VSS 4
5 VREF
* Includes Exposed Thermal Pad (EP); see Table 3-1.
© 2011 Microchip Technology Inc.
DS25073A-page 1