MCP6231_09 Datasheet, PDF (1/40 Pages) Microchip Technology – 20 μA, 300 kHz Rail-to-Rail Op Amp

MCP6231/1R/1U/2/4
20 µA, 300 kHz Rail-to-Rail Op Amp
Features
• Gain Bandwidth Product: 300 kHz (typical)
• Supply Current: I_Q = 20 µA (typical)
• Supply Voltage: 1.8V to 6.0V
• Rail-to-Rail Input/Output
• Extended Temperature Range: -40°C to +125°C
• Available in 5-Pin SC70 and SOT-23 packages
Applications
• Automotive
• Portable Equipment
• Transimpedance amplifiers
• Analog Filters
• Notebooks and PDAs
• Battery-Powered Systems
Design Aids
• SPICE Macro Models
• FilterLab^® Software
• Mindi™ Circuit Designer & Simulator
• Microchip Advanced Part Selector (MAPS)
• Analog Demonstration and Evaluation Boards
• Application Notes
Typical Application
V_IN2
V_IN1
R_G2
R_G1
V_DD
R_X
R_Y
R_Z
R_F
–
MCP6231
+
V_OUT
Summing Amplifier Circuit
Description
The Microchip Technology Inc. MCP6231/1R/1U/2/4
operational amplifiers (op amps) provide wide
bandwidth for the quiescent current. The MCP6231/1R/
1U/2/4 family has a 300 kHz gain bandwidth product
and 65°C (typical) phase margin. This family operates
from a single supply voltage as low as 1.8V, while
drawing 20 µA (typical) quiescent current. In addition,
the MCP6231/1R/1U/2/4 family supports rail-to-rail
input and output swing, with a common mode input
voltage range of V_DD + 300 mV to V_SS – 300 mV.
These op amps are designed in one of Microchip’s
advanced CMOS processes.
Package Types
MCP6231
SOT-23-5
V_{OUT 1}
V_{SS 2}
V_IN+ ₃
5 ^VDD
–
4 ^VIN^–
MCP6231
MSOP, PDIP, SOIC
NC 1
V_IN– 2 –
V_IN+ 3 ⁺
V_SS 4
8 NC
7 V_DD
6 V_OUT
5 NC
MCP6231R
MCP6232
SOT-23-5
MSOP, PDIP, SOIC
V_{OUT 1}
V_{DD 2}
V_IN+ ₃
5 ^VSS ^VOUTA 1
8 V_DD
–
V_{INA_} 2 - ₊
7 V_OUTB
4 ^VIN^– V_INA+ 3
+ - 6 _{VINB_}
V_SS 4
5 V_INB+
MCP6231U
MCP6232
SC70-5, SOT-23-5
2x3 TDFN *
V_IN+ ₁
V_{SS 2}
–
V_IN– ₃
5 ^VDD ^{VOUTA 1}
8 ^VDD
V_{INA_} 2 _EP 7 V_OUTB
4 V_OUT ^{VINA+ 3}
9
6 V_{INB_}
V_SS 4
5 V_INB+
MCP6231
MCP6234
DFN *
PDIP, SOIC, TSSOP
NC 1
8 NC V_OUTA 1
14 V_OUTD
V_IN– 2 _EP 7 V_DD ^VINA^– 2 ^{- + +} - ^{13 V}IND^–
V_IN+ 3
9
6 V_OUT ^VINA^{+ 3}
12 V_IND+
V_SS 4
5 NC
V_{DD 4}
11 V_SS
V_INB+ 5
10 V_INC+
V_INB– 6 ^{- + + -} 9 V_INC–
V_OUTB 7
8 V_OUTC
* Includes Exposed Thermal Pad (EP); see Table 3-1.
© 2009 Microchip Technology Inc.
DS21881E-page 1